Index: include/llvm/ADT/Triple.h =================================================================== --- include/llvm/ADT/Triple.h +++ include/llvm/ADT/Triple.h @@ -110,6 +110,7 @@ ARMSubArch_v7m, ARMSubArch_v7s, ARMSubArch_v7k, + ARMSubArch_v7ve, ARMSubArch_v6, ARMSubArch_v6m, ARMSubArch_v6k, Index: include/llvm/Support/ARMTargetParser.def =================================================================== --- include/llvm/Support/ARMTargetParser.def +++ include/llvm/Support/ARMTargetParser.def @@ -82,6 +82,9 @@ FK_NONE, ARM::AEK_HWDIV) ARM_ARCH("armv7e-m", AK_ARMV7EM, "7E-M", "v7em", ARMBuildAttrs::CPUArch::v7E_M, FK_NONE, (ARM::AEK_HWDIV | ARM::AEK_DSP)) +ARM_ARCH("armv7ve", AK_ARMV7VE, "7VE", "v7ve", ARMBuildAttrs::CPUArch::v7, + FK_NEON, (ARM::AEK_VIRT | ARM::AEK_HWDIVARM | ARM::AEK_HWDIV | + ARM::AEK_DSP)) ARM_ARCH("armv8-a", AK_ARMV8A, "8-A", "v8", ARMBuildAttrs::CPUArch::v8_A, FK_CRYPTO_NEON_FP_ARMV8, (ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT | ARM::AEK_HWDIVARM | Index: include/llvm/Support/MachO.h =================================================================== --- include/llvm/Support/MachO.h +++ include/llvm/Support/MachO.h @@ -1500,7 +1500,8 @@ CPU_SUBTYPE_ARM_V7K = 12, CPU_SUBTYPE_ARM_V6M = 14, CPU_SUBTYPE_ARM_V7M = 15, - CPU_SUBTYPE_ARM_V7EM = 16 + CPU_SUBTYPE_ARM_V7EM = 16, + CPU_SUBTYPE_ARM_V7VE = 17 }; enum CPUSubTypeARM64 { Index: lib/Object/MachOObjectFile.cpp =================================================================== --- lib/Object/MachOObjectFile.cpp +++ lib/Object/MachOObjectFile.cpp @@ -2471,6 +2471,10 @@ if (ArchFlag) *ArchFlag = "armv7s"; return Triple("armv7s-apple-darwin"); + case MachO::CPU_SUBTYPE_ARM_V7VE: + if (ArchFlag) + *ArchFlag = "armv7ve"; + return Triple("armv7ve-apple-darwin"); default: return Triple(); } @@ -2525,6 +2529,7 @@ .Case("armv7k", true) .Case("armv7m", true) .Case("armv7s", true) + .Case("armv7ve", true) .Case("arm64", true) .Case("ppc", true) .Case("ppc64", true) Index: lib/Support/Triple.cpp =================================================================== --- lib/Support/Triple.cpp +++ lib/Support/Triple.cpp @@ -559,6 +559,8 @@ return Triple::ARMSubArch_v7s; case ARM::AK_ARMV7EM: return Triple::ARMSubArch_v7em; + case ARM::AK_ARMV7VE: + return Triple::ARMSubArch_v7ve; case ARM::AK_ARMV8A: return Triple::ARMSubArch_v8; case ARM::AK_ARMV8_1A: Index: lib/Target/ARM/ARM.td =================================================================== --- lib/Target/ARM/ARM.td +++ lib/Target/ARM/ARM.td @@ -441,6 +441,16 @@ FeatureDSP, FeatureT2XtPk]>; +def ARMv7ve : Architecture<"armv7ve", "ARMv7ve", [HasV7Ops, + FeatureNEON, + FeatureDB, + FeatureDSP, + FeatureHWDiv, + FeatureHWDivARM, + FeatureVirtualization, + FeatureAClass, + FeatureT2XtPk]>; + def ARMv8a : Architecture<"armv8-a", "ARMv8a", [HasV8Ops, FeatureAClass, FeatureDB, Index: lib/Target/ARM/ARMSubtarget.h =================================================================== --- lib/Target/ARM/ARMSubtarget.h +++ lib/Target/ARM/ARMSubtarget.h @@ -52,8 +52,8 @@ enum ARMArchEnum { ARMv2, ARMv2a, ARMv3, ARMv3m, ARMv4, ARMv4t, ARMv5, ARMv5t, ARMv5te, ARMv5tej, ARMv6, ARMv6k, ARMv6kz, ARMv6t2, ARMv6m, ARMv6sm, ARMv7a, ARMv7r, - ARMv7m, ARMv7em, ARMv8a, ARMv81a, ARMv82a, ARMv8mMainline, ARMv8mBaseline, - ARMv8r + ARMv7m, ARMv7em, ARMv7ve, ARMv8a, ARMv81a, ARMv82a, ARMv8mMainline, + ARMv8mBaseline, ARMv8r }; public: Index: lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp =================================================================== --- lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp +++ lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp @@ -1115,6 +1115,8 @@ return MachO::CPU_SUBTYPE_ARM_V7M; case ARM::AK_ARMV7EM: return MachO::CPU_SUBTYPE_ARM_V7EM; + case ARM::AK_ARMV7VE: + return MachO::CPU_SUBTYPE_ARM_V7VE; } } Index: test/CodeGen/ARM/div.ll =================================================================== --- test/CodeGen/ARM/div.ll +++ test/CodeGen/ARM/div.ll @@ -10,12 +10,18 @@ ; RUN: FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-HWDIV ; RUN: llc < %s -mtriple=arm-none-eabi -mcpu=cortex-a8 | \ ; RUN: FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-EABI +; RUN: llc < %s -mtriple=armv7ve-apple-ios | \ +; RUN: FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-HWDIV +; RUN: llc < %s -mtriple=thumbv7ve-apple-ios | \ +; RUN: FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-HWDIV \ +; RUN: -check-prefix=CHECK-THUMB define i32 @f1(i32 %a, i32 %b) { entry: ; CHECK-LABEL: f1 ; CHECK-SWDIV: __divsi3 +; CHECK-THUMB: .thumb_func ; CHECK-HWDIV: sdiv ; CHECK-EABI: __aeabi_idiv @@ -28,6 +34,7 @@ ; CHECK-LABEL: f2 ; CHECK-SWDIV: __udivsi3 +; CHECK-THUMB: .thumb_func ; CHECK-HWDIV: udiv ; CHECK-EABI: __aeabi_uidiv @@ -40,6 +47,7 @@ ; CHECK-LABEL: f3 ; CHECK-SWDIV: __modsi3 +; CHECK-THUMB: .thumb_func ; CHECK-HWDIV: sdiv ; CHECK-HWDIV: mls @@ -55,6 +63,7 @@ ; CHECK-LABEL: f4 ; CHECK-SWDIV: __umodsi3 +; CHECK-THUMB: .thumb_func ; CHECK-HWDIV: udiv ; CHECK-HWDIV: mls Index: tools/llvm-objdump/MachODump.cpp =================================================================== --- tools/llvm-objdump/MachODump.cpp +++ tools/llvm-objdump/MachODump.cpp @@ -1360,6 +1360,10 @@ outs() << " cputype CPU_TYPE_ARM\n"; outs() << " cpusubtype CPU_SUBTYPE_ARM_V7S\n"; break; + case MachO::CPU_SUBTYPE_ARM_V7VE: + outs() << " cputype CPU_TYPE_ARM\n"; + outs() << " cpusubtype CPU_SUBTYPE_ARM_V7VE\n"; + break; default: printUnknownCPUType(cputype, cpusubtype); break; Index: tools/llvm-readobj/MachODumper.cpp =================================================================== --- tools/llvm-readobj/MachODumper.cpp +++ tools/llvm-readobj/MachODumper.cpp @@ -157,6 +157,7 @@ LLVM_READOBJ_ENUM_ENT(MachO, CPU_SUBTYPE_ARM_V6M), LLVM_READOBJ_ENUM_ENT(MachO, CPU_SUBTYPE_ARM_V7M), LLVM_READOBJ_ENUM_ENT(MachO, CPU_SUBTYPE_ARM_V7EM), + LLVM_READOBJ_ENUM_ENT(MachO, CPU_SUBTYPE_ARM_V7VE), }; static const EnumEntry MachOHeaderCpuSubtypesARM64[] = {