Index: llvm/trunk/include/llvm/Support/ARMTargetParser.def =================================================================== --- llvm/trunk/include/llvm/Support/ARMTargetParser.def +++ llvm/trunk/include/llvm/Support/ARMTargetParser.def @@ -229,6 +229,8 @@ ARM_CPU_NAME("cortex-m3", AK_ARMV7M, FK_NONE, true, ARM::AEK_NONE) ARM_CPU_NAME("cortex-m4", AK_ARMV7EM, FK_FPV4_SP_D16, true, ARM::AEK_NONE) ARM_CPU_NAME("cortex-m7", AK_ARMV7EM, FK_FPV5_D16, false, ARM::AEK_NONE) +ARM_CPU_NAME("cortex-m23", AK_ARMV8MBaseline, FK_NONE, false, ARM::AEK_NONE) +ARM_CPU_NAME("cortex-m33", AK_ARMV8MMainline, FK_FPV5_SP_D16, false, ARM::AEK_DSP) ARM_CPU_NAME("cortex-a32", AK_ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false, ARM::AEK_CRC) ARM_CPU_NAME("cortex-a35", AK_ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false, ARM::AEK_CRC) ARM_CPU_NAME("cortex-a53", AK_ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, true, ARM::AEK_CRC) Index: llvm/trunk/lib/Target/ARM/ARM.td =================================================================== --- llvm/trunk/lib/Target/ARM/ARM.td +++ llvm/trunk/lib/Target/ARM/ARM.td @@ -759,6 +759,16 @@ FeatureFPARMv8, FeatureD16]>; +def : ProcNoItin<"cortex-m23", [ARMv8mBaseline, + FeatureNoMovt]>; + +def : ProcNoItin<"cortex-m33", [ARMv8mMainline, + FeatureDSP, + FeatureT2XtPk, + FeatureFPARMv8, + FeatureD16, + FeatureVFPOnlySP]>; + def : ProcNoItin<"cortex-a32", [ARMv8a, FeatureHWDiv, FeatureHWDivARM, Index: llvm/trunk/test/CodeGen/ARM/build-attributes.ll =================================================================== --- llvm/trunk/test/CodeGen/ARM/build-attributes.ll +++ llvm/trunk/test/CodeGen/ARM/build-attributes.ll @@ -102,6 +102,10 @@ ; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 -mattr=+fp-only-sp -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M7-FAST ; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 | FileCheck %s --check-prefix=CORTEX-M7-DOUBLE ; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING +; RUN: llc < %s -mtriple=thumbv8-linux-gnueabi -mcpu=cortex-m23 | FileCheck %s --check-prefix=CORTEX-M23 +; RUN: llc < %s -mtriple=thumbv8-linux-gnueabi -mcpu=cortex-m33 | FileCheck %s --check-prefix=CORTEX-M33 +; RUN: llc < %s -mtriple=thumbv8-linux-gnueabi -mcpu=cortex-m33 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M33-FAST +; RUN: llc < %s -mtriple=thumbv8-linux-gnueabi -mcpu=cortex-m33 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING ; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r4 | FileCheck %s --check-prefix=CORTEX-R4 ; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r4f | FileCheck %s --check-prefix=CORTEX-R4F ; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r5 | FileCheck %s --check-prefix=CORTEX-R5 @@ -210,6 +214,12 @@ ; RUN: llc < %s -mtriple=arm-none-none-eabi -mcpu=cortex-r52 -mattr=-neon,+fp-only-sp,+d16 | FileCheck %s --check-prefix=ARMv8R --check-prefix=ARMv8R-SP ; RUN: llc < %s -mtriple=arm-none-none-eabi -mcpu=cortex-r52 | FileCheck %s --check-prefix=ARMv8R --check-prefix=ARMv8R-NEON +; ARMv8-M +; RUN: llc < %s -mtriple=thumbv8-none-none-eabi -mcpu=cortex-m23 | FileCheck %s --check-prefix=NO-STRICT-ALIGN +; RUN: llc < %s -mtriple=thumbv8-none-none-eabi -mcpu=cortex-m23 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN +; RUN: llc < %s -mtriple=thumbv8-none-none-eabi -mcpu=cortex-m33 | FileCheck %s --check-prefix=NO-STRICT-ALIGN +; RUN: llc < %s -mtriple=thumbv8-none-none-eabi -mcpu=cortex-m33 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN + ; XSCALE: .eabi_attribute 6, 5 ; XSCALE: .eabi_attribute 8, 1 ; XSCALE: .eabi_attribute 9, 1 @@ -1310,6 +1320,55 @@ ; CORTEX-A32-FAST-NOT: .eabi_attribute 22 ; CORTEX-A32-FAST: .eabi_attribute 23, 1 +; CORTEX-M23: .cpu cortex-m23 +; CORTEX-M23: .eabi_attribute 6, 16 +; CORTEX-M23: .eabi_attribute 7, 77 +; CORTEX-M23: .eabi_attribute 8, 0 +; CORTEX-M23: .eabi_attribute 9, 3 +; CORTEX-M23: .eabi_attribute 17, 1 +;; We default to IEEE 754 compliance +; CORTEX-M23-NOT: .eabi_attribute 19 +; CORTEX-M23: .eabi_attribute 20, 1 +; CORTEX-M23: .eabi_attribute 21, 1 +; CORTEX-M23: .eabi_attribute 23, 3 +; CORTEX-M23: .eabi_attribute 34, 1 +; CORTEX-M23: .eabi_attribute 24, 1 +; CORTEX-M23-NOT: .eabi_attribute 27 +; CORTEX-M23-NOT: .eabi_attribute 28 +; CORTEX-M23: .eabi_attribute 25, 1 +; CORTEX-M23: .eabi_attribute 38, 1 +; CORTEX-M23: .eabi_attribute 14, 0 +; CORTEX-M23-NOT: .eabi_attribute 44 + +; CORTEX-M33: .cpu cortex-m33 +; CORTEX-M33: .eabi_attribute 6, 17 +; CORTEX-M33: .eabi_attribute 7, 77 +; CORTEX-M33: .eabi_attribute 8, 0 +; CORTEX-M33: .eabi_attribute 9, 3 +; CORTEX-M33: .fpu fpv5-sp-d16 +; CORTEX-M33: .eabi_attribute 17, 1 +;; We default to IEEE 754 compliance +; CORTEX-M23-NOT: .eabi_attribute 19 +; CORTEX-M33: .eabi_attribute 20, 1 +; CORTEX-M33: .eabi_attribute 21, 1 +; CORTEX-M33: .eabi_attribute 23, 3 +; CORTEX-M33: .eabi_attribute 34, 1 +; CORTEX-M33: .eabi_attribute 24, 1 +; CORTEX-M33: .eabi_attribute 25, 1 +; CORTEX-M33: .eabi_attribute 27, 1 +; CORTEX-M33-NOT: .eabi_attribute 28 +; CORTEX-M33: .eabi_attribute 36, 1 +; CORTEX-M33: .eabi_attribute 38, 1 +; CORTEX-M33: .eabi_attribute 46, 1 +; CORTEX-M33-NOT: .eabi_attribute 44 +; CORTEX-M33: .eabi_attribute 14, 0 + +; CORTEX-M33-FAST-NOT: .eabi_attribute 19 +; CORTEX-M33-FAST: .eabi_attribute 20, 2 +; CORTEX-M33-FAST-NOT: .eabi_attribute 21 +; CORTEX-M33-FAST-NOT: .eabi_attribute 22 +; CORTEX-M33-FAST: .eabi_attribute 23, 1 + ; CORTEX-A35: .cpu cortex-a35 ; CORTEX-A35: .eabi_attribute 6, 14 ; CORTEX-A35: .eabi_attribute 7, 65 Index: llvm/trunk/test/CodeGen/ARM/movt.ll =================================================================== --- llvm/trunk/test/CodeGen/ARM/movt.ll +++ llvm/trunk/test/CodeGen/ARM/movt.ll @@ -2,10 +2,15 @@ ; rdar://7317664 ; RUN: llc -mtriple=thumbv8m.base %s -o - | FileCheck %s +; RUN: llc -mtriple=thumbv8m.base -mcpu=cortex-m23 %s -o - | FileCheck %s --check-prefix=NOMOVT +; RUN: llc -mtriple=thumbv8m.base -mcpu=cortex-m33 %s -o - | FileCheck %s define i32 @t(i32 %X) nounwind { ; CHECK-LABEL: t: ; CHECK: movt r{{[0-9]}}, #65535 +; NOMOVT-LABEL: t: +; NOMOVT-NOT: movt r{{[0-9]}}, #65535 +; NOMOVT: ldr r{{[0-9]}}, .LCP entry: %0 = or i32 %X, -65536 ret i32 %0 @@ -14,6 +19,9 @@ define i32 @t2(i32 %X) nounwind { ; CHECK-LABEL: t2: ; CHECK: movt r{{[0-9]}}, #65534 +; NOMOVT-LABEL: t2: +; NOMOVT-NOT: movt r{{[0-9]}}, #65534 +; NOMOVT: ldr r{{[0-9]}}, .LCP entry: %0 = or i32 %X, -131072 %1 = and i32 %0, -65537 Index: llvm/trunk/unittests/Support/TargetParserTest.cpp =================================================================== --- llvm/trunk/unittests/Support/TargetParserTest.cpp +++ llvm/trunk/unittests/Support/TargetParserTest.cpp @@ -246,6 +246,10 @@ ARM::AEK_VIRT | ARM::AEK_HWDIVARM | ARM::AEK_HWDIV | ARM::AEK_DSP, "8-A")); + EXPECT_TRUE(testARMCPU("cortex-m23", "armv8-m.base", "none", + ARM::AEK_HWDIV, "8-M.Baseline")); + EXPECT_TRUE(testARMCPU("cortex-m33", "armv8-m.main", "fpv5-sp-d16", + ARM::AEK_HWDIV | ARM::AEK_DSP, "8-M.Mainline")); EXPECT_TRUE(testARMCPU("iwmmxt", "iwmmxt", "none", ARM::AEK_NONE, "iwmmxt")); EXPECT_TRUE(testARMCPU("xscale", "xscale", "none",