Index: lib/Target/Mips/MipsTargetMachine.cpp
===================================================================
--- lib/Target/Mips/MipsTargetMachine.cpp
+++ lib/Target/Mips/MipsTargetMachine.cpp
@@ -70,6 +70,11 @@
   // align them to 32 bits. 64 bit integers have natural alignment.
   Ret += "-i8:8:32-i16:16:32-i64:64";
 
+  // 128 bit integers are always aligned to 128 bits, but only 64-bit matters,
+  // because __int128 is only supoprted on 64-bit targets.
+  if (ABI.IsN64() || ABI.IsN32())
+    Ret += "-i128:128";
+
   // 32 bit registers are always available and the stack is at least 64 bit
   // aligned. On N64 64 bit registers are also available and the stack is
   // 128 bit aligned.
Index: lib/Target/PowerPC/PPCTargetMachine.cpp
===================================================================
--- lib/Target/PowerPC/PPCTargetMachine.cpp
+++ lib/Target/PowerPC/PPCTargetMachine.cpp
@@ -107,6 +107,11 @@
   else
     Ret += "-f64:32:64";
 
+  // 128 bit integers are always aligned to 128 bits, but only 64-bit matters,
+  // because __int128 is only supoprted on 64-bit targets.
+  if (is64Bit)
+    Ret += "-i128:128";
+
   // PPC64 has 32 and 64 bit registers, PPC32 has only 32 bit ones.
   if (is64Bit)
     Ret += "-n32:64";
Index: lib/Target/Sparc/SparcTargetMachine.cpp
===================================================================
--- lib/Target/Sparc/SparcTargetMachine.cpp
+++ lib/Target/Sparc/SparcTargetMachine.cpp
@@ -39,6 +39,11 @@
   // Alignments for 64 bit integers.
   Ret += "-i64:64";
 
+  // 128 bit integers are always aligned to 128 bits, but only 64-bit matters,
+  // because __int128 is only supoprted on 64-bit targets.
+  if (is64Bit)
+    Ret += "-i128:128";
+
   // On SparcV9 128 floats are aligned to 128 bits, on others only to 64.
   // On SparcV9 registers can hold 64 or 32 bits, on others only 32.
   if (is64Bit)
Index: lib/Target/SystemZ/SystemZTargetMachine.cpp
===================================================================
--- lib/Target/SystemZ/SystemZTargetMachine.cpp
+++ lib/Target/SystemZ/SystemZTargetMachine.cpp
@@ -61,8 +61,8 @@
   // special requirements for stack variables though.
   Ret += "-i1:8:16-i8:8:16";
 
-  // 64-bit integers are naturally aligned.
-  Ret += "-i64:64";
+  // 64-bit and 128-bit integers are naturally aligned.
+  Ret += "-i64:64-i128:128";
 
   // 128-bit floats are aligned only to 64 bits.
   Ret += "-f128:64";
Index: lib/Target/X86/X86TargetMachine.cpp
===================================================================
--- lib/Target/X86/X86TargetMachine.cpp
+++ lib/Target/X86/X86TargetMachine.cpp
@@ -80,6 +80,11 @@
   else
     Ret += "-f64:32:64";
 
+  // 128 bit integers are always aligned to 128 bits, but only 64-bit matters,
+  // because __int128 is only supoprted on 64-bit targets.
+  if (TT.isArch64Bit())
+    Ret += "-i128:128";
+
   // Some ABIs align long double to 128 bits, others to 32.
   if (TT.isOSNaCl() || TT.isOSIAMCU())
     ; // No f80
Index: test/CodeGen/X86/catchpad-dynamic-alloca.ll
===================================================================
--- test/CodeGen/X86/catchpad-dynamic-alloca.ll
+++ test/CodeGen/X86/catchpad-dynamic-alloca.ll
@@ -62,4 +62,4 @@
 ; CHECK-LABEL: $handlerMap$0$test2:
 ; CHECK:      .long   0
 ; CHECK-NEXT: .long   0
-; CHECK-NEXT: .long   8
+; CHECK-NEXT: .long   16
Index: test/CodeGen/X86/osx-private-labels.ll
===================================================================
--- test/CodeGen/X86/osx-private-labels.ll
+++ test/CodeGen/X86/osx-private-labels.ll
@@ -36,7 +36,7 @@
 
 @private6 = private unnamed_addr constant i128 42
 ; CHECK: .section	__TEXT,__literal16,16byte_literals
-; CHECK-NEXT: .p2align	3
+; CHECK-NEXT: .p2align	4
 ; CHECK-NEXT: L_private6:
 
 %struct._objc_class = type { i8* }