Index: lld/trunk/ELF/SyntheticSections.h =================================================================== --- lld/trunk/ELF/SyntheticSections.h +++ lld/trunk/ELF/SyntheticSections.h @@ -464,6 +464,7 @@ size_t getSize() const override; void addEntry(SymbolBody &Sym); bool empty() const override { return Entries.empty(); } + void addSymbols(); private: std::vector> Entries; @@ -479,6 +480,7 @@ size_t getSize() const override; void addEntry(SymbolBody &Sym); bool empty() const override { return Entries.empty(); } + void addSymbols(); private: std::vector> Entries; @@ -700,6 +702,10 @@ template InputSection *createCommonSection(); template InputSection *createInterpSection(); template MergeInputSection *createCommentSection(); +template +SymbolBody * +addSyntheticLocal(StringRef Name, uint8_t Type, typename ELFT::uint Value, + typename ELFT::uint Size, InputSectionBase *Section); // Linker generated sections which can be used as inputs. template struct In { Index: lld/trunk/ELF/SyntheticSections.cpp =================================================================== --- lld/trunk/ELF/SyntheticSections.cpp +++ lld/trunk/ELF/SyntheticSections.cpp @@ -287,6 +287,18 @@ return Ret; } +template +SymbolBody *elf::addSyntheticLocal(StringRef Name, uint8_t Type, + typename ELFT::uint Value, + typename ELFT::uint Size, + InputSectionBase *Section) { + auto *S = make>(Name, /*IsLocal*/ true, STV_DEFAULT, + Type, Value, Size, Section, nullptr); + if (In::SymTab) + In::SymTab->addLocal(S); + return S; +} + static size_t getHashSize() { switch (Config->BuildId) { case BuildIdKind::Fast: @@ -1443,6 +1455,17 @@ return Target->PltHeaderSize + Entries.size() * Target->PltEntrySize; } +// Some architectures such as additional symbols in the PLT section. For +// example ARM uses mapping symbols to aid disassembly +template void PltSection::addSymbols() { + Target->addPltHeaderSymbols(this); + size_t Off = Target->PltHeaderSize; + for (size_t I = 0; I < Entries.size(); ++I) { + Target->addPltSymbols(this, Off); + Off += Target->PltEntrySize; + } +} + template IpltSection::IpltSection() : SyntheticSection(SHF_ALLOC | SHF_EXECINSTR, SHT_PROGBITS, 16, @@ -1473,6 +1496,14 @@ return Entries.size() * Target->PltEntrySize; } +template void IpltSection::addSymbols() { + size_t Off = 0; + for (size_t I = 0; I < Entries.size(); ++I) { + Target->addPltSymbols(this, Off); + Off += Target->PltEntrySize; + } +} + template GdbIndexSection::GdbIndexSection() : SyntheticSection(0, SHT_PROGBITS, 1, ".gdb_index"), @@ -1886,6 +1917,19 @@ template MergeInputSection *elf::createCommentSection(); template MergeInputSection *elf::createCommentSection(); +template SymbolBody * +elf::addSyntheticLocal(StringRef, uint8_t, ELF32LE::uint, + ELF32LE::uint, InputSectionBase *); +template SymbolBody * +elf::addSyntheticLocal(StringRef, uint8_t, ELF32BE::uint, + ELF32BE::uint, InputSectionBase *); +template SymbolBody * +elf::addSyntheticLocal(StringRef, uint8_t, ELF64LE::uint, + ELF64LE::uint, InputSectionBase *); +template SymbolBody * +elf::addSyntheticLocal(StringRef, uint8_t, ELF64BE::uint, + ELF64BE::uint, InputSectionBase *); + template class elf::MipsAbiFlagsSection; template class elf::MipsAbiFlagsSection; template class elf::MipsAbiFlagsSection; Index: lld/trunk/ELF/Target.h =================================================================== --- lld/trunk/ELF/Target.h +++ lld/trunk/ELF/Target.h @@ -41,7 +41,8 @@ virtual void writePlt(uint8_t *Buf, uint64_t GotEntryAddr, uint64_t PltEntryAddr, int32_t Index, unsigned RelOff) const {} - + virtual void addPltHeaderSymbols(InputSectionData* IS) const {} + virtual void addPltSymbols(InputSectionData* IS, uint64_t Off) const {} // Returns true if a relocation only uses the low bits of a value such that // all those bits are in in the same page. For example, if the relocation // only uses the low 12 bits in a system with 4k pages. If this is true, the Index: lld/trunk/ELF/Target.cpp =================================================================== --- lld/trunk/ELF/Target.cpp +++ lld/trunk/ELF/Target.cpp @@ -223,6 +223,8 @@ void writePltHeader(uint8_t *Buf) const override; void writePlt(uint8_t *Buf, uint64_t GotEntryAddr, uint64_t PltEntryAddr, int32_t Index, unsigned RelOff) const override; + void addPltSymbols(InputSectionData *IS, uint64_t Off) const override; + void addPltHeaderSymbols(InputSectionData *ISD) const override; RelExpr getThunkExpr(RelExpr Expr, uint32_t RelocType, const InputFile *File, const SymbolBody &S) const override; void relocateOne(uint8_t *Loc, uint32_t Type, uint64_t Val) const override; @@ -1731,6 +1733,12 @@ write32le(Buf + 16, GotPlt - L1 - 8); } +void ARMTargetInfo::addPltHeaderSymbols(InputSectionData *ISD) const { + auto *IS = cast>(ISD); + addSyntheticLocal("$a", STT_NOTYPE, 0, 0, IS); + addSyntheticLocal("$d", STT_NOTYPE, 16, 0, IS); +} + void ARMTargetInfo::writePlt(uint8_t *Buf, uint64_t GotEntryAddr, uint64_t PltEntryAddr, int32_t Index, unsigned RelOff) const { @@ -1748,6 +1756,12 @@ write32le(Buf + 12, GotEntryAddr - L1 - 8); } +void ARMTargetInfo::addPltSymbols(InputSectionData *ISD, uint64_t Off) const { + auto *IS = cast>(ISD); + addSyntheticLocal("$a", STT_NOTYPE, Off, 0, IS); + addSyntheticLocal("$d", STT_NOTYPE, Off + 12, 0, IS); +} + RelExpr ARMTargetInfo::getThunkExpr(RelExpr Expr, uint32_t RelocType, const InputFile *File, const SymbolBody &S) const { Index: lld/trunk/ELF/Writer.cpp =================================================================== --- lld/trunk/ELF/Writer.cpp +++ lld/trunk/ELF/Writer.cpp @@ -1028,6 +1028,11 @@ // we can correctly decide if a dynamic relocation is needed. forEachRelSec(scanRelocations); + if (In::Plt && !In::Plt->empty()) + In::Plt->addSymbols(); + if (In::Iplt && !In::Iplt->empty()) + In::Iplt->addSymbols(); + // Now that we have defined all possible symbols including linker- // synthesized ones. Visit all symbols to give the finishing touches. for (Symbol *S : Symtab::X->getSymbols()) { Index: lld/trunk/test/ELF/arm-gnu-ifunc-plt.s =================================================================== --- lld/trunk/test/ELF/arm-gnu-ifunc-plt.s +++ lld/trunk/test/ELF/arm-gnu-ifunc-plt.s @@ -41,33 +41,41 @@ // DISASM: 11018: 05 00 00 eb bl #20 // DISASM-NEXT: 1101c: 08 00 00 eb bl #32 // DISASM-NEXT: Disassembly of section .plt: -// DISASM-NEXT: .plt: +// DISASM-NEXT: $a: // DISASM-NEXT: 11020: 04 e0 2d e5 str lr, [sp, #-4]! // DISASM-NEXT: 11024: 04 e0 9f e5 ldr lr, [pc, #4] // DISASM-NEXT: 11028: 0e e0 8f e0 add lr, pc, lr // DISASM-NEXT: 1102c: 08 f0 be e5 ldr pc, [lr, #8]! -// DISASM-NEXT: 11030: d0 0f 00 00 +// DISASM: $d: +// DISASM-NEXT: 11030: d0 0f 00 00 .word 0x00000fd0 +// DISASM: $a: // DISASM-NEXT: 11034: 04 c0 9f e5 ldr r12, [pc, #4] // DISASM-NEXT: 11038: 0f c0 8c e0 add r12, r12, pc // DISASM-NEXT: 1103c: 00 f0 9c e5 ldr pc, [r12] -// DISASM-NEXT: 11040: cc 0f 00 00 +// DISASM: $d: +// DISASM-NEXT: 11040: cc 0f 00 00 .word 0x00000fcc +// DISASM: $a: // DISASM-NEXT: 11044: 04 c0 9f e5 ldr r12, [pc, #4] // DISASM-NEXT: 11048: 0f c0 8c e0 add r12, r12, pc // DISASM-NEXT: 1104c: 00 f0 9c e5 ldr pc, [r12] -// DISASM-NEXT: 11050: c0 0f 00 00 +// DISASM: $d: +// DISASM-NEXT: 11050: c0 0f 00 00 .word 0x00000fc0 // Alignment to 16 byte boundary not strictly necessary on ARM, but harmless -// DISASM-NEXT: 11054: 00 00 00 00 andeq r0, r0, r0 -// DISASM-NEXT: 11058: 00 00 00 00 andeq r0, r0, r0 -// DISASM-NEXT: 1105c: 00 00 00 00 andeq r0, r0, r0 +// DISASM-NEXT: 11054: 00 00 00 00 .word 0x00000000 +// DISASM-NEXT: 11058: 00 00 00 00 .word 0x00000000 +// DISASM-NEXT: 1105c: 00 00 00 00 .word 0x00000000 +// DISASM: $a: // DISASM-NEXT: 11060: 04 c0 9f e5 ldr r12, [pc, #4] // DISASM-NEXT: 11064: 0f c0 8c e0 add r12, r12, pc // DISASM-NEXT: 11068: 00 f0 9c e5 ldr pc, [r12] -// DISASM-NEXT: 1106c: 14 20 00 00 +// DISASM: $d: +// DISASM-NEXT: 1106c: 14 20 00 00 .word 0x00002014 +// DISASM: $a: // DISASM-NEXT: 11070: 04 c0 9f e5 ldr r12, [pc, #4] // DISASM-NEXT: 11074: 0f c0 8c e0 add r12, r12, pc // DISASM-NEXT: 11078: 00 f0 9c e5 ldr pc, [r12] -// DISASM-NEXT: 1107c: 08 20 00 00 - +// DISASM: $d: +// DISASM-NEXT: 1107c: 08 20 00 00 .word 0x00002008 .syntax unified .text Index: lld/trunk/test/ELF/arm-gnu-ifunc.s =================================================================== --- lld/trunk/test/ELF/arm-gnu-ifunc.s +++ lld/trunk/test/ELF/arm-gnu-ifunc.s @@ -60,7 +60,7 @@ // CHECK-NEXT: } // CHECK-NEXT: ] // CHECK: Symbol { -// CHECK: Name: __rel_iplt_end (6) +// CHECK: Name: __rel_iplt_end // CHECK-NEXT: Value: 0x10104 // CHECK-NEXT: Size: 0 // CHECK-NEXT: Binding: Local @@ -124,14 +124,17 @@ // DISASM-NEXT: 11018: 04 01 00 e3 movw r0, #260 // DISASM-NEXT: 1101c: 01 00 40 e3 movt r0, #1 // DISASM-NEXT: Disassembly of section .plt: -// DISASM-NEXT: .plt: -// DISASM-NEXT: 11020: 04 c0 9f e5 ldr r12, [pc, #4] -// DISASM-NEXT: 11024: 0f c0 8c e0 add r12, r12, pc +// DISASM: $a: +// DISASM-NEXT: 11020: 04 c0 9f e5 ldr r12, [pc, #4] +// DISASM-NEXT: 11024: 0f c0 8c e0 add r12, r12, pc // 11024 + 8 + fd4 = 0x12000 -// DISASM-NEXT: 11028: 00 f0 9c e5 ldr pc, [r12] -// DISASM-NEXT: 1102c: d4 0f 00 00 -// DISASM-NEXT: 11030: 04 c0 9f e5 ldr r12, [pc, #4] -// DISASM-NEXT: 11034: 0f c0 8c e0 add r12, r12, pc -// 11034 + 8 + fc8 = 0x12004 -// DISASM-NEXT: 11038: 00 f0 9c e5 ldr pc, [r12] -// DISASM-NEXT: 1103c: c8 0f 00 00 +// DISASM-NEXT: 11028: 00 f0 9c e5 ldr pc, [r12] +// DISASM: $d: +// DISASM-NEXT: 1102c: d4 0f 00 00 .word 0x00000fd4 +// DISASM: $a: +// DISASM-NEXT: 11030: 04 c0 9f e5 ldr r12, [pc, #4] +// DISASM-NEXT: 11034: 0f c0 8c e0 add r12, r12, pc +// 11034 + 8 + fc8 = 0x12004 +// DISASM-NEXT: 11038: 00 f0 9c e5 ldr pc, [r12] +// DISASM: $d: +// DISASM-NEXT: 1103c: c8 0f 00 00 .word 0x00000fc8 Index: lld/trunk/test/ELF/arm-plt-reloc.s =================================================================== --- lld/trunk/test/ELF/arm-plt-reloc.s +++ lld/trunk/test/ELF/arm-plt-reloc.s @@ -46,29 +46,37 @@ // DSO-NEXT: 1010: 0b 00 00 eb bl #44 // S(0x1054) - P(0x1014) + A(-8) = 0x38 = 56 // DSO-NEXT: 1014: 0e 00 00 0a beq #56 + // DSO: Disassembly of section .plt: -// DSO-NEXT:.plt: -// DSO-NEXT: 1020: 04 e0 2d e5 str lr, [sp, #-4]! -// DSO-NEXT: 1024: 04 e0 9f e5 ldr lr, [pc, #4] -// DSO-NEXT: 1028: 0e e0 8f e0 add lr, pc, lr -// DSO-NEXT: 102c: 08 f0 be e5 ldr pc, [lr, #8]! +// DSO-NEXT: $a: +// DSO-NEXT: 1020: 04 e0 2d e5 str lr, [sp, #-4]! +// DSO-NEXT: 1024: 04 e0 9f e5 ldr lr, [pc, #4] +// DSO-NEXT: 1028: 0e e0 8f e0 add lr, pc, lr +// DSO-NEXT: 102c: 08 f0 be e5 ldr pc, [lr, #8]! // 0x1028 + 8 + 0fd0 = 0x2000 -// DSO-NEXT: 1030: d0 0f 00 00 -// DSO-NEXT: 1034: 04 c0 9f e5 ldr r12, [pc, #4] -// DSO-NEXT: 1038: 0f c0 8c e0 add r12, r12, pc -// DSO-NEXT: 103c: 00 f0 9c e5 ldr pc, [r12] -// 0x1038 + 8 + 0fcc = 0x200c -// DSO-NEXT: 1040: cc 0f 00 00 -// DSO-NEXT: 1044: 04 c0 9f e5 ldr r12, [pc, #4] -// DSO-NEXT: 1048: 0f c0 8c e0 add r12, r12, pc -// DSO-NEXT: 104c: 00 f0 9c e5 ldr pc, [r12] +// DSO: $d: +// DSO-NEXT: 1030: d0 0f 00 00 .word 0x00000fd0 +// DSO: $a: +// DSO-NEXT: 1034: 04 c0 9f e5 ldr r12, [pc, #4] +// DSO-NEXT: 1038: 0f c0 8c e0 add r12, r12, pc +// DSO-NEXT: 103c: 00 f0 9c e5 ldr pc, [r12] +// 0x1038 + 8 + 0fcc = 0x200c +// DSO: $d: +// DSO-NEXT: 1040: cc 0f 00 00 .word 0x00000fcc +// DSO: $a: +// DSO-NEXT: 1044: 04 c0 9f e5 ldr r12, [pc, #4] +// DSO-NEXT: 1048: 0f c0 8c e0 add r12, r12, pc +// DSO-NEXT: 104c: 00 f0 9c e5 ldr pc, [r12] // 0x1048 + 8 + 0fc0 = 0x2010 -// DSO-NEXT: 1050: c0 0f 00 00 -// DSO-NEXT: 1054: 04 c0 9f e5 ldr r12, [pc, #4] -// DSO-NEXT: 1058: 0f c0 8c e0 add r12, r12, pc -// DSO-NEXT: 105c: 00 f0 9c e5 ldr pc, [r12] +// DSO: $d: +// DSO-NEXT: 1050: c0 0f 00 00 .word 0x00000fc0 +// DSO: $a: +// DSO-NEXT: 1054: 04 c0 9f e5 ldr r12, [pc, #4] +// DSO-NEXT: 1058: 0f c0 8c e0 add r12, r12, pc +// DSO-NEXT: 105c: 00 f0 9c e5 ldr pc, [r12] // 0x1058 + 8 + 0fb4 = 0x2014 -// DSO-NEXT: 1060: b4 0f 00 00 +// DSO: $d: +// DSO-NEXT: 1060: b4 0f 00 00 .word 0x00000fb4 // DSOREL: Name: .got.plt // DSOREL-NEXT: Type: SHT_PROGBITS Index: lld/trunk/test/ELF/arm-thumb-interwork-shared.s =================================================================== --- lld/trunk/test/ELF/arm-thumb-interwork-shared.s +++ lld/trunk/test/ELF/arm-thumb-interwork-shared.s @@ -28,17 +28,22 @@ // CHECK-NEXT: 101e: 60 47 bx r12 // PLT: Disassembly of section .plt: -// PLT-NEXT: .plt: -// PLT: 1020: 04 e0 2d e5 str lr, [sp, #-4]! +// PLT: $a: +// PLT-NEXT: 1020: 04 e0 2d e5 str lr, [sp, #-4]! // PLT-NEXT: 1024: 04 e0 9f e5 ldr lr, [pc, #4] // PLT-NEXT: 1028: 0e e0 8f e0 add lr, pc, lr // PLT-NEXT: 102c: 08 f0 be e5 ldr pc, [lr, #8]! -// PLT-NEXT: 1030: d0 0f 00 00 +// PLT: $d: +// PLT-NEXT: 1030: d0 0f 00 00 .word 0x00000fd0 +// PLT: $a: // PLT-NEXT: 1034: 04 c0 9f e5 ldr r12, [pc, #4] // PLT-NEXT: 1038: 0f c0 8c e0 add r12, r12, pc // PLT-NEXT: 103c: 00 f0 9c e5 ldr pc, [r12] -// PLT-NEXT: 1040: cc 0f 00 00 +// PLT: $d: +// PLT-NEXT: 1040: cc 0f 00 00 .word 0x00000fcc +// PLT: $a: // PLT-NEXT: 1044: 04 c0 9f e5 ldr r12, [pc, #4] // PLT-NEXT: 1048: 0f c0 8c e0 add r12, r12, pc // PLT-NEXT: 104c: 00 f0 9c e5 ldr pc, [r12] -// PLT-NEXT: 1050: c0 0f 00 00 +// PLT: $d: +// PLT-NEXT: 1050: c0 0f 00 00 .word 0x00000fc0 Index: lld/trunk/test/ELF/arm-thumb-plt-reloc.s =================================================================== --- lld/trunk/test/ELF/arm-thumb-plt-reloc.s +++ lld/trunk/test/ELF/arm-thumb-plt-reloc.s @@ -58,27 +58,34 @@ // 0x1010 + 0x40 + 4 = 0x1054 = PLT func3 // DSOTHUMB-NEXT: 1010: 00 f0 20 e8 blx #64 // DSOARM: Disassembly of section .plt: -// DSOARM: .plt: +// DSOARM-NEXT: $a: // DSOARM-NEXT: 1020: 04 e0 2d e5 str lr, [sp, #-4]! // DSOARM-NEXT: 1024: 04 e0 9f e5 ldr lr, [pc, #4] // DSOARM-NEXT: 1028: 0e e0 8f e0 add lr, pc, lr // DSOARM-NEXT: 102c: 08 f0 be e5 ldr pc, [lr, #8]! -// DSOARM-NEXT: 1030: d0 0f 00 00 +// DSOARM: $d: +// DSOARM-NEXT: 1030: d0 0f 00 00 .word 0x00000fd0 // 0x1028 + 8 + 0fd0 = 0x2000 +// DSOARM: $a: // DSOARM-NEXT: 1034: 04 c0 9f e5 ldr r12, [pc, #4] // DSOARM-NEXT: 1038: 0f c0 8c e0 add r12, r12, pc // DSOARM-NEXT: 103c: 00 f0 9c e5 ldr pc, [r12] -// DSOARM-NEXT: 1040: cc 0f 00 00 +// DSOARM: $d: +// DSOARM-NEXT: 1040: cc 0f 00 00 .word 0x00000fcc // 0x1038 + 8 + 0fcc = 0x200c +// DSOARM: $a: // DSOARM-NEXT: 1044: 04 c0 9f e5 ldr r12, [pc, #4] // DSOARM-NEXT: 1048: 0f c0 8c e0 add r12, r12, pc // DSOARM-NEXT: 104c: 00 f0 9c e5 ldr pc, [r12] -// DSOARM-NEXT: 1050: c0 0f 00 00 +// DSOARM: $d: +// DSOARM-NEXT: 1050: c0 0f 00 00 .word 0x00000fc0 // 0x1048 + 8 + 0fc0 = 0x2010 +// DSOARM: $a: // DSOARM-NEXT: 1054: 04 c0 9f e5 ldr r12, [pc, #4] // DSOARM-NEXT: 1058: 0f c0 8c e0 add r12, r12, pc // DSOARM-NEXT: 105c: 00 f0 9c e5 ldr pc, [r12] -// DSOARM-NEXT: 1060: b4 0f 00 00 +// DSOARM: $d: +// DSOARM-NEXT: 1060: b4 0f 00 00 .word 0x00000fb4 // 0x1058 + 8 + 0fb4 = 0x2014 // DSOREL: Name: .got.plt