Index: lib/Target/NDS32/CMakeLists.txt
===================================================================
--- lib/Target/NDS32/CMakeLists.txt
+++ lib/Target/NDS32/CMakeLists.txt
@@ -1,5 +1,13 @@
+set(LLVM_TARGET_DEFINITIONS NDS32.td)
+
+tablegen(LLVM NDS32GenSubtargetInfo.inc -gen-subtarget)
+
+add_public_tablegen_target(NDS32CommonTableGen)
+
+
 add_llvm_target(NDS32CodeGen
   NDS32TargetMachine.cpp
+  NDS32Subtarget.cpp
   )
 
 add_subdirectory(TargetInfo)
Index: lib/Target/NDS32/MCTargetDesc/NDS32MCTargetDesc.h
===================================================================
--- lib/Target/NDS32/MCTargetDesc/NDS32MCTargetDesc.h
+++ lib/Target/NDS32/MCTargetDesc/NDS32MCTargetDesc.h
@@ -35,4 +35,8 @@
 
 } // End llvm namespace
 
+#define GET_SUBTARGETINFO_ENUM
+#include "NDS32GenSubtargetInfo.inc"
+
+
 #endif
Index: lib/Target/NDS32/MCTargetDesc/NDS32MCTargetDesc.cpp
===================================================================
--- lib/Target/NDS32/MCTargetDesc/NDS32MCTargetDesc.cpp
+++ lib/Target/NDS32/MCTargetDesc/NDS32MCTargetDesc.cpp
@@ -19,5 +19,16 @@
 
 using namespace llvm;
 
+#define GET_SUBTARGETINFO_MC_DESC
+#include "NDS32GenSubtargetInfo.inc"
+
+static MCSubtargetInfo *
+createNDS32MCSubtargetInfo(const Triple &TT, StringRef CPU, StringRef FS) {
+  return createNDS32MCSubtargetInfoImpl(TT, CPU, FS);
+}
+
 extern "C" void LLVMInitializeNDS32TargetMC() {
+  // Register the MC subtarget info.
+  TargetRegistry::RegisterMCSubtargetInfo(getTheNDS32Target(),
+                                          createNDS32MCSubtargetInfo);
 }
Index: lib/Target/NDS32/NDS32.td
===================================================================
--- /dev/null
+++ lib/Target/NDS32/NDS32.td
@@ -0,0 +1,39 @@
+//===-- NDS32.td - Describe the NDS32 Target Machine -----*- tablegen -*---===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+// This is the top level entry point for the NDS32 target.
+//===----------------------------------------------------------------------===//
+
+//===----------------------------------------------------------------------===//
+// Target-independent interfaces
+//===----------------------------------------------------------------------===//
+
+include "llvm/Target/Target.td"
+
+//===----------------------------------------------------------------------===//
+// Subtarget Features.
+//===----------------------------------------------------------------------===//
+
+def FeatureNo16Bit : SubtargetFeature<"no-16bit", "No16Bit", "true",
+                                      "Disable generate 16-bit ISA">;
+
+
+//===----------------------------------------------------------------------===//
+// NDS32 supported processors.
+//===----------------------------------------------------------------------===//
+class Proc<string Name, list<SubtargetFeature> Features>
+ : Processor<Name, NoItineraries, Features>;
+
+def : Proc<"generic",         []>;
+
+//===----------------------------------------------------------------------===//
+// Target Declaration
+//===----------------------------------------------------------------------===//
+
+def NDS32 : Target {
+}
Index: lib/Target/NDS32/NDS32Subtarget.h
===================================================================
--- /dev/null
+++ lib/Target/NDS32/NDS32Subtarget.h
@@ -0,0 +1,52 @@
+//===-- NDS32Subtarget.h - Define Subtarget for the NDS32 ----*- C++ -*----===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// This file declares the NDS32 specific subclass of TargetSubtargetInfo.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef LLVM_LIB_TARGET_NDS32_NDS32SUBTARGET_H
+#define LLVM_LIB_TARGET_NDS32_NDS32SUBTARGET_H
+
+#include "llvm/IR/DataLayout.h"
+#include "llvm/Target/TargetSubtargetInfo.h"
+#include <string>
+
+#define GET_SUBTARGETINFO_HEADER
+#include "NDS32GenSubtargetInfo.inc"
+
+namespace llvm {
+class StringRef;
+
+class NDS32Subtarget : public NDS32GenSubtargetInfo {
+  virtual void anchor();
+
+public:
+  /// This constructor initializes the data members to match that
+  /// of the specified triple.
+  ///
+  NDS32Subtarget(const Triple &TT, const std::string &CPU,
+                 const std::string &FS, const TargetMachine &TM);
+
+  NDS32Subtarget &initializeSubtargetDependencies(StringRef CPU, StringRef FS);
+
+  /// ParseSubtargetFeatures - Parses features string setting specified
+  /// subtarget options.  Definition of function is auto generated by tblgen.
+  void ParseSubtargetFeatures(StringRef CPU, StringRef FS);
+
+protected:
+  /// No16Bit - Not generate 16-Bit ISA
+  bool No16Bit = false;
+
+public:
+  bool has16Bit() const { return !No16Bit; }
+};
+} // End llvm namespace
+
+#endif  // LLVM_TARGET_NDS32_SUBTARGET_H
Index: lib/Target/NDS32/NDS32Subtarget.cpp
===================================================================
--- /dev/null
+++ lib/Target/NDS32/NDS32Subtarget.cpp
@@ -0,0 +1,38 @@
+//===-- NDS32Subtarget.cpp - NDS32 Subtarget Information ------------------===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// This file implements the NDS32 specific subclass of TargetSubtargetInfo.
+//
+//===----------------------------------------------------------------------===//
+
+#include "NDS32Subtarget.h"
+#include "NDS32.h"
+#include "llvm/Support/TargetRegistry.h"
+
+using namespace llvm;
+
+#define DEBUG_TYPE "NDS32-subtarget"
+
+#define GET_SUBTARGETINFO_TARGET_DESC
+#define GET_SUBTARGETINFO_CTOR
+#include "NDS32GenSubtargetInfo.inc"
+
+void NDS32Subtarget::anchor() { }
+
+NDS32Subtarget &
+NDS32Subtarget::initializeSubtargetDependencies(StringRef CPU, StringRef FS) {
+  ParseSubtargetFeatures(CPU, FS);
+  return *this;
+}
+
+NDS32Subtarget::NDS32Subtarget(const Triple &TT, const std::string &CPU,
+                               const std::string &FS, const TargetMachine &TM)
+    : NDS32GenSubtargetInfo(TT, CPU, FS) {
+  ParseSubtargetFeatures(CPU, FS);
+}
Index: lib/Target/NDS32/NDS32TargetMachine.h
===================================================================
--- lib/Target/NDS32/NDS32TargetMachine.h
+++ lib/Target/NDS32/NDS32TargetMachine.h
@@ -15,6 +15,7 @@
 #ifndef LLVM_LIB_TARGET_NDS32_NDS32TARGETMACHINE_H
 #define LLVM_LIB_TARGET_NDS32_NDS32TARGETMACHINE_H
 
+#include "NDS32Subtarget.h"
 #include "llvm/Target/TargetFrameLowering.h"
 #include "llvm/Target/TargetMachine.h"
 
@@ -26,7 +27,8 @@
 
 protected:
   std::unique_ptr<TargetLoweringObjectFile> TLOF;
-
+  NDS32Subtarget Subtarget;
+  mutable StringMap<std::unique_ptr<NDS32Subtarget>> SubtargetMap;
 
 public:
   NDS32TargetMachine(const Target &T, const Triple &TT, StringRef CPU,
@@ -35,6 +37,9 @@
                      CodeGenOpt::Level OL);
   ~NDS32TargetMachine() override;
 
+  const NDS32Subtarget *getSubtargetImpl() const { return &Subtarget; }
+  const NDS32Subtarget *getSubtargetImpl(const Function &F) const override;
+
   TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
 
   TargetLoweringObjectFile *getObjFileLowering() const override {
Index: lib/Target/NDS32/NDS32TargetMachine.cpp
===================================================================
--- lib/Target/NDS32/NDS32TargetMachine.cpp
+++ lib/Target/NDS32/NDS32TargetMachine.cpp
@@ -76,12 +76,36 @@
     : LLVMTargetMachine(T, computeDataLayout(TT, CPU, Options, true),
                         TT, CPU, FS, Options, getEffectiveRelocModel(RM),
                         CM, OL),
-      TLOF(make_unique<TargetLoweringObjectFileELF>()) {
+      TLOF(make_unique<TargetLoweringObjectFileELF>()),
+      Subtarget(TT, CPU, FS, *this) {
   initAsmInfo();
 }
 
 NDS32TargetMachine::~NDS32TargetMachine() {}
 
+const NDS32Subtarget *
+NDS32TargetMachine::getSubtargetImpl(const Function &F) const {
+  Attribute CPUAttr = F.getFnAttribute("target-cpu");
+  Attribute FSAttr = F.getFnAttribute("target-features");
+
+  std::string CPU = !CPUAttr.hasAttribute(Attribute::None)
+                        ? CPUAttr.getValueAsString().str()
+                        : TargetCPU;
+  std::string FS = !FSAttr.hasAttribute(Attribute::None)
+                       ? FSAttr.getValueAsString().str()
+                       : TargetFS;
+
+  auto &I = SubtargetMap[CPU + FS];
+  if (!I) {
+    // This needs to be done before we create a new subtarget since any
+    // creation will depend on the TM and the code generation flags on the
+    // function that reside in TargetOptions.
+    resetTargetOptions(F);
+    I = llvm::make_unique<NDS32Subtarget>(TargetTriple, CPU, FS, *this);
+  }
+  return I.get();
+}
+
 namespace {
 /// NDS32 Code Generator Pass Configuration Options.
 class NDS32PassConfig : public TargetPassConfig {