Index: llvm/trunk/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
===================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
+++ llvm/trunk/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
@@ -1470,6 +1470,9 @@
   bool IsUnscaled = TII->isUnscaledLdSt(MI);
   int Offset = getLdStOffsetOp(MI).getImm();
   int OffsetStride = IsUnscaled ? getMemScale(MI) : 1;
+  // Allow one more for offset.
+  if (Offset > 0)
+    Offset -= OffsetStride;
   if (!inBoundsForPair(IsUnscaled, Offset, OffsetStride))
     return false;
 
Index: llvm/trunk/test/CodeGen/AArch64/store_merge_pair_offset.ll
===================================================================
--- llvm/trunk/test/CodeGen/AArch64/store_merge_pair_offset.ll
+++ llvm/trunk/test/CodeGen/AArch64/store_merge_pair_offset.ll
@@ -0,0 +1,12 @@
+; RUN: llc -mtriple=aarch64-linux-gnu -aarch64-enable-atomic-cfg-tidy=0 -disable-lsr -verify-machineinstrs -enable-misched=false -enable-post-misched=false -o - %s | FileCheck %s
+
+define i64 @test(i64* %a) nounwind {
+  ; CHECK: ldp	x{{[0-9]+}}, x{{[0-9]+}}
+  ; CHECK-NOT: ldr
+  %p1 = getelementptr inbounds i64, i64* %a, i32 64
+  %tmp1 = load i64, i64* %p1, align 2
+  %p2 = getelementptr inbounds i64, i64* %a, i32 63
+  %tmp2 = load i64, i64* %p2, align 2
+  %tmp3 = add i64 %tmp1, %tmp2
+  ret i64 %tmp3
+}