Index: lib/CodeGen/GlobalISel/IRTranslator.cpp =================================================================== --- lib/CodeGen/GlobalISel/IRTranslator.cpp +++ lib/CodeGen/GlobalISel/IRTranslator.cpp @@ -125,8 +125,11 @@ MachineBasicBlock &IRTranslator::getOrCreateBB(const BasicBlock &BB) { MachineBasicBlock *&MBB = BBToMBB[&BB]; if (!MBB) { - MBB = MF->CreateMachineBasicBlock(); + MBB = MF->CreateMachineBasicBlock(&BB); MF->push_back(MBB); + + if (BB.hasAddressTaken()) + MBB->setHasAddressTaken(); } return *MBB; } Index: test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll =================================================================== --- test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll +++ test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll @@ -52,10 +52,10 @@ ; CHECK: body: ; ; ABI/constant lowering and IR-level entry basic block. -; CHECK: {{bb.[0-9]+}}: +; CHECK: {{bb.[0-9]+}} (%ir-block.{{[0-9]+}}): ; ; Make sure we have one successor and only one. -; CHECK-NEXT: successors: %[[END:bb.[0-9]+]](0x80000000) +; CHECK-NEXT: successors: %[[END:bb.[0-9]+.end]](0x80000000) ; ; Check that we emit the correct branch. ; CHECK: G_BR %[[END]] @@ -74,10 +74,10 @@ ; CHECK: body: ; ; ABI/constant lowering and IR-level entry basic block. -; CHECK: {{bb.[0-9]+}}: +; CHECK: {{bb.[0-9]+}} (%ir-block.{{[0-9]+}}): ; Make sure we have two successors -; CHECK-NEXT: successors: %[[TRUE:bb.[0-9]+]](0x40000000), -; CHECK: %[[FALSE:bb.[0-9]+]](0x40000000) +; CHECK-NEXT: successors: %[[TRUE:bb.[0-9]+.true]](0x40000000), +; CHECK: %[[FALSE:bb.[0-9]+.false]](0x40000000) ; ; CHECK: [[ADDR:%.*]](p0) = COPY %x0 ; @@ -105,19 +105,19 @@ ; CHECK: body: ; ; ABI/constant lowering and IR-level entry basic block. -; CHECK: {{bb.[0-9]+}}: +; CHECK: {{bb.[0-9]+.entry}}: ; Make sure we have one successor -; CHECK-NEXT: successors: %[[BB_L1:bb.[0-9]+]](0x80000000) +; CHECK-NEXT: successors: %[[BB_L1:bb.[0-9]+.L1]](0x80000000) ; CHECK: G_BR %[[BB_L1]] ; ; Check basic block L1 has 2 successors: BBL1 and BBL2 -; CHECK: [[BB_L1]]: +; CHECK: [[BB_L1]] (address-taken): ; CHECK-NEXT: successors: %[[BB_L1]](0x40000000), -; CHECK: %[[BB_L2:bb.[0-9]+]](0x40000000) +; CHECK: %[[BB_L2:bb.[0-9]+.L2]](0x40000000) ; CHECK: G_BRINDIRECT %{{[0-9]+}}(p0) ; ; Check basic block L2 is the return basic block -; CHECK: [[BB_L2]]: +; CHECK: [[BB_L2]] (address-taken): ; CHECK-NEXT: RET_ReallyLR @indirectbr.L = internal unnamed_addr constant [3 x i8*] [i8* blockaddress(@indirectbr, %L1), i8* blockaddress(@indirectbr, %L2), i8* null], align 8 @@ -259,11 +259,11 @@ ; CHECK-LABEL: name: trivial_bitcast_with_copy ; CHECK: [[A:%[0-9]+]](p0) = COPY %x0 -; CHECK: G_BR %[[CAST:bb\.[0-9]+]] +; CHECK: G_BR %[[CAST:bb\.[0-9]+.cast]] ; CHECK: [[CAST]]: ; CHECK: {{%[0-9]+}}(p0) = COPY [[A]] -; CHECK: G_BR %[[END:bb\.[0-9]+]] +; CHECK: G_BR %[[END:bb\.[0-9]+.end]] ; CHECK: [[END]]: define i64* @trivial_bitcast_with_copy(i8* %a) { @@ -360,8 +360,8 @@ } ; CHECK-LABEL: name: test_phi -; CHECK: G_BRCOND {{%.*}}, %[[TRUE:bb\.[0-9]+]] -; CHECK: G_BR %[[FALSE:bb\.[0-9]+]] +; CHECK: G_BRCOND {{%.*}}, %[[TRUE:bb\.[0-9]+.true]] +; CHECK: G_BR %[[FALSE:bb\.[0-9]+.false]] ; CHECK: [[TRUE]]: ; CHECK: [[RES1:%[0-9]+]](s32) = G_LOAD @@ -969,7 +969,7 @@ ; correct. define i8* @test_const_placement() { ; CHECK-LABEL: name: test_const_placement -; CHECK: bb.{{[0-9]+}}: +; CHECK: bb.{{[0-9]+}} (%ir-block.{{[0-9]+}}): ; CHECK: [[VAL_INT:%[0-9]+]](s32) = G_CONSTANT i32 42 ; CHECK: [[VAL:%[0-9]+]](p0) = G_INTTOPTR [[VAL_INT]](s32) ; CHECK: G_BR Index: test/CodeGen/AArch64/GlobalISel/irtranslator-exceptions.ll =================================================================== --- test/CodeGen/AArch64/GlobalISel/irtranslator-exceptions.ll +++ test/CodeGen/AArch64/GlobalISel/irtranslator-exceptions.ll @@ -8,8 +8,8 @@ ; CHECK: name: bar ; CHECK: body: -; CHECK-NEXT: bb.1: -; CHECK: successors: %[[GOOD:bb.[0-9]+]]{{.*}}%[[BAD:bb.[0-9]+]] +; CHECK-NEXT: bb.1 (%ir-block.0): +; CHECK: successors: %[[GOOD:bb.[0-9]+.continue]]{{.*}}%[[BAD:bb.[0-9]+.broken]] ; CHECK: EH_LABEL ; CHECK: %w0 = COPY ; CHECK: BL @foo, csr_aarch64_aapcs, implicit-def %lr, implicit %sp, implicit %w0, implicit-def %w0 Index: test/CodeGen/X86/GlobalISel/irtranslator-call.ll =================================================================== --- test/CodeGen/X86/GlobalISel/irtranslator-call.ll +++ test/CodeGen/X86/GlobalISel/irtranslator-call.ll @@ -24,7 +24,7 @@ ; CHECK-NEXT: hasVAStart: false ; CHECK-NEXT: hasMustTailInVarArgFunc: false ; CHECK-NEXT: body: -; CHECK-NEXT: bb.1: +; CHECK-NEXT: bb.1.entry: ; CHECK-NEXT: RET 0 entry: ret void