Index: llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp =================================================================== --- llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp +++ llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp @@ -468,12 +468,11 @@ std::pair LT = TLI->getTypeLegalizationCost(DL, Src); if (ST->isMisaligned128StoreSlow() && Opcode == Instruction::Store && - Src->isVectorTy() && Alignment != 16 && - Src->getVectorElementType()->isIntegerTy(64)) { - // Unaligned stores are extremely inefficient. We don't split - // unaligned v2i64 stores because the negative impact that has shown in - // practice on inlined memcpy code. - // We make v2i64 stores expensive so that we will only vectorize if there + Src->getPrimitiveSizeInBits() == 128 && Alignment < 16) { + // Unaligned stores are extremely inefficient. We don't split all + // unaligned 128-bit stores because the negative impact that has shown in + // practice on inlined block copy code. + // We make such stores expensive so that we will only vectorize if there // are 6 other instructions getting vectorized. int AmortizationCost = 6; Index: llvm/test/Analysis/CostModel/AArch64/store.ll =================================================================== --- llvm/test/Analysis/CostModel/AArch64/store.ll +++ llvm/test/Analysis/CostModel/AArch64/store.ll @@ -1,17 +1,35 @@ -; RUN: opt < %s -cost-model -analyze -mtriple=aarch64-apple-ios | FileCheck %s -; RUN: opt < %s -cost-model -analyze -mtriple=aarch64-apple-ios -mattr=slow-misaligned-128store | FileCheck %s --check-prefix=SLOW_MISALIGNED_128_STORE +; RUN: opt < %s -cost-model -analyze -mtriple=aarch64-unknown | FileCheck %s +; RUN: opt < %s -cost-model -analyze -mtriple=aarch64-unknown -mattr=slow-misaligned-128store | FileCheck %s --check-prefix=SLOW_MISALIGNED_128_STORE target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:32:64-v128:32:128-a0:0:32-n32-S32" ; CHECK-LABEL: getMemoryOpCost ; SLOW_MISALIGNED_128_STORE-LABEL: getMemoryOpCost define void @getMemoryOpCost() { - ; If FeatureSlowMisaligned128Store is set, we penalize <2 x i64> stores. On + ; If FeatureSlowMisaligned128Store is set, we penalize 128-bit stores. On ; Cyclone, for example, such stores should be expensive because we don't ; split them and misaligned 16b stores have bad performance. - ; + ; CHECK: cost of 1 {{.*}} store ; SLOW_MISALIGNED_128_STORE: cost of 12 {{.*}} store store <2 x i64> undef, <2 x i64> * undef + ; CHECK-NEXT: cost of 1 {{.*}} store + ; SLOW_MISALIGNED_128_STORE-NEXT: cost of 12 {{.*}} store + store <2 x f64> undef, <2 x f64> * undef + ; CHECK-NEXT: cost of 1 {{.*}} store + ; SLOW_MISALIGNED_128_STORE-NEXT: cost of 12 {{.*}} store + store <4 x i32> undef, <4 x i32> * undef + ; CHECK-NEXT: cost of 1 {{.*}} store + ; SLOW_MISALIGNED_128_STORE-NEXT: cost of 12 {{.*}} store + store <4 x f32> undef, <4 x f32> * undef + ; CHECK-NEXT: cost of 1 {{.*}} store + ; SLOW_MISALIGNED_128_STORE-NEXT: cost of 12 {{.*}} store + store <8 x i16> undef, <8 x i16> * undef + ; CHECK-NEXT: cost of 1 {{.*}} store + ; SLOW_MISALIGNED_128_STORE-NEXT: cost of 12 {{.*}} store + store <8 x f16> undef, <8 x f16> * undef + ; CHECK-NEXT: cost of 1 {{.*}} store + ; SLOW_MISALIGNED_128_STORE-NEXT: cost of 12 {{.*}} store + store <16 x i8> undef, <16 x i8> * undef ; We scalarize the loads/stores because there is no vector register name for ; these types (they get extended to v.4h/v.2s).