Index: llvm/trunk/include/llvm/CodeGen/MachineInstr.h =================================================================== --- llvm/trunk/include/llvm/CodeGen/MachineInstr.h +++ llvm/trunk/include/llvm/CodeGen/MachineInstr.h @@ -1149,10 +1149,11 @@ // // Debugging support // - void print(raw_ostream &OS, bool SkipOpers = false) const; - void print(raw_ostream &OS, ModuleSlotTracker &MST, - bool SkipOpers = false) const; - void dump() const; + void print(raw_ostream &OS, bool SkipOpers = false, + const TargetInstrInfo *TII = nullptr) const; + void print(raw_ostream &OS, ModuleSlotTracker &MST, bool SkipOpers = false, + const TargetInstrInfo *TII = nullptr) const; + void dump(const TargetInstrInfo *TII = nullptr) const; //===--------------------------------------------------------------------===// // Accessors used to build up machine instructions. Index: llvm/trunk/lib/CodeGen/MachineCombiner.cpp =================================================================== --- llvm/trunk/lib/CodeGen/MachineCombiner.cpp +++ llvm/trunk/lib/CodeGen/MachineCombiner.cpp @@ -135,7 +135,7 @@ // are tracked in the InstrIdxForVirtReg map depth is looked up in InstrDepth for (auto *InstrPtr : InsInstrs) { // for each Use unsigned IDepth = 0; - DEBUG(dbgs() << "NEW INSTR "; InstrPtr->dump(); dbgs() << "\n";); + DEBUG(dbgs() << "NEW INSTR "; InstrPtr->dump(TII); dbgs() << "\n";); for (const MachineOperand &MO : InstrPtr->operands()) { // Check for virtual register operand. if (!(MO.isReg() && TargetRegisterInfo::isVirtualRegister(MO.getReg()))) Index: llvm/trunk/lib/CodeGen/MachineInstr.cpp =================================================================== --- llvm/trunk/lib/CodeGen/MachineInstr.cpp +++ llvm/trunk/lib/CodeGen/MachineInstr.cpp @@ -1692,29 +1692,30 @@ } } -LLVM_DUMP_METHOD void MachineInstr::dump() const { +LLVM_DUMP_METHOD void MachineInstr::dump(const TargetInstrInfo *TII) const { #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) - dbgs() << " " << *this; + dbgs() << " "; + print(dbgs(), false /* SkipOpers */, TII); #endif } -void MachineInstr::print(raw_ostream &OS, bool SkipOpers) const { +void MachineInstr::print(raw_ostream &OS, bool SkipOpers, + const TargetInstrInfo *TII) const { const Module *M = nullptr; if (const MachineBasicBlock *MBB = getParent()) if (const MachineFunction *MF = MBB->getParent()) M = MF->getFunction()->getParent(); ModuleSlotTracker MST(M); - print(OS, MST, SkipOpers); + print(OS, MST, SkipOpers, TII); } void MachineInstr::print(raw_ostream &OS, ModuleSlotTracker &MST, - bool SkipOpers) const { + bool SkipOpers, const TargetInstrInfo *TII) const { // We can be a bit tidier if we know the MachineFunction. const MachineFunction *MF = nullptr; const TargetRegisterInfo *TRI = nullptr; const MachineRegisterInfo *MRI = nullptr; - const TargetInstrInfo *TII = nullptr; const TargetIntrinsicInfo *IntrinsicInfo = nullptr; if (const MachineBasicBlock *MBB = getParent()) { @@ -1722,7 +1723,8 @@ if (MF) { MRI = &MF->getRegInfo(); TRI = MF->getSubtarget().getRegisterInfo(); - TII = MF->getSubtarget().getInstrInfo(); + if (!TII) + TII = MF->getSubtarget().getInstrInfo(); IntrinsicInfo = MF->getTarget().getIntrinsicInfo(); } } Index: llvm/trunk/test/CodeGen/AArch64/machine-combiner-madd.ll =================================================================== --- llvm/trunk/test/CodeGen/AArch64/machine-combiner-madd.ll +++ llvm/trunk/test/CodeGen/AArch64/machine-combiner-madd.ll @@ -7,6 +7,11 @@ ; RUN: llc -mtriple=aarch64-linux-gnu -mcpu=exynos-m2 < %s | FileCheck %s ; RUN: llc -mtriple=aarch64-linux-gnu -mcpu=kryo < %s | FileCheck %s ; RUN: llc -mtriple=aarch64-linux-gnu -mcpu=vulcan < %s | FileCheck %s +; RUN: llc -mtriple=aarch64-linux-gnu -mcpu=cortex-a57 -debug-only=machine-combiner < %s 2>&1 > /dev/null | FileCheck %s --check-prefix COMBINE-DUMP + +; The machine-combiner debugging dumps should print the new instruction. +; COMBINE-DUMP: NEW INSTR{{.*}}MADDXrrr +; COMBINE-DUMP-NOT: NEW INSTR{{.*}}UNKNOWN ; Make sure that inst-combine fuses the multiply add in the addressing mode of ; the load.