Index: lib/CodeGen/AsmPrinter/ARMException.cpp =================================================================== --- lib/CodeGen/AsmPrinter/ARMException.cpp +++ lib/CodeGen/AsmPrinter/ARMException.cpp @@ -36,12 +36,6 @@ #include "llvm/Target/TargetRegisterInfo.h" using namespace llvm; -static cl::opt -EnableARMEHABIDescriptors("arm-enable-ehabi-descriptors", cl::Hidden, - cl::desc("Generate ARM EHABI tables with unwinding descriptors"), - cl::init(false)); - - ARMException::ARMException(AsmPrinter *A) : DwarfException(A) {} @@ -74,25 +68,23 @@ Asm->OutStreamer.EmitLabel(Asm->GetTempSymbol("eh_func_end", Asm->getFunctionNumber())); - if (EnableARMEHABIDescriptors) { - // Map all labels and get rid of any dead landing pads. - MMI->TidyLandingPads(); + // Map all labels and get rid of any dead landing pads. + MMI->TidyLandingPads(); - if (!MMI->getLandingPads().empty()) { - // Emit references to personality. - if (const Function * Personality = - MMI->getPersonalities()[MMI->getPersonalityIndex()]) { - MCSymbol *PerSym = Asm->getSymbol(Personality); - Asm->OutStreamer.EmitSymbolAttribute(PerSym, MCSA_Global); - ATS.emitPersonality(PerSym); - } + if (!MMI->getLandingPads().empty()) { + // Emit references to personality. + if (const Function * Personality = + MMI->getPersonalities()[MMI->getPersonalityIndex()]) { + MCSymbol *PerSym = Asm->getSymbol(Personality); + Asm->OutStreamer.EmitSymbolAttribute(PerSym, MCSA_Global); + ATS.emitPersonality(PerSym); + } - // Emit .handlerdata directive. - ATS.emitHandlerData(); + // Emit .handlerdata directive. + ATS.emitHandlerData(); - // Emit actual exception table - EmitExceptionTable(); - } + // Emit actual exception table + EmitExceptionTable(); } } Index: lib/Target/ARM/ARMAsmPrinter.cpp =================================================================== --- lib/Target/ARM/ARMAsmPrinter.cpp +++ lib/Target/ARM/ARMAsmPrinter.cpp @@ -1106,7 +1106,7 @@ } } -extern cl::opt EnableARMEHABI; +extern cl::opt DisableARMEHABI; // Simple pseudo-instructions have their lowering (with expansion to real // instructions) auto-generated. @@ -1122,7 +1122,8 @@ } // Emit unwinding stuff for frame-related instructions - if (EnableARMEHABI && MI->getFlag(MachineInstr::FrameSetup)) + if (!Subtarget->isTargetMachO() && !DisableARMEHABI && + MI->getFlag(MachineInstr::FrameSetup)) EmitUnwindingInstruction(MI); // Do any auto-generated pseudo lowerings. Index: lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.cpp =================================================================== --- lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.cpp +++ lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.cpp @@ -16,9 +16,11 @@ using namespace llvm; +// ARM EHABI is experimental but the quality is good enough +// to be turned on by default on non-Darwin ARM targets. cl::opt -EnableARMEHABI("arm-enable-ehabi", cl::Hidden, - cl::desc("Generate ARM EHABI tables"), +DisableARMEHABI("arm-disable-ehabi", cl::Hidden, + cl::desc("Disable ARM experimental exception handling"), cl::init(false)); @@ -52,7 +54,7 @@ SupportsDebugInformation = true; // Exceptions handling - if (EnableARMEHABI) + if (!DisableARMEHABI) ExceptionsType = ExceptionHandling::ARM; // foo(plt) instead of foo@plt Index: test/CodeGen/ARM/arm-ttype-target2.ll =================================================================== --- test/CodeGen/ARM/arm-ttype-target2.ll +++ test/CodeGen/ARM/arm-ttype-target2.ll @@ -1,4 +1,4 @@ -; RUN: llc -mtriple=armv7-none-linux-gnueabi -arm-enable-ehabi -arm-enable-ehabi-descriptors < %s | FileCheck %s +; RUN: llc -mtriple=armv7-none-linux-gnueabi < %s | FileCheck %s @_ZTVN10__cxxabiv117__class_type_infoE = external global i8* @_ZTS3Foo = linkonce_odr constant [5 x i8] c"3Foo\00" Index: test/CodeGen/ARM/ehabi-filters.ll =================================================================== --- test/CodeGen/ARM/ehabi-filters.ll +++ test/CodeGen/ARM/ehabi-filters.ll @@ -1,4 +1,4 @@ -; RUN: llc -arm-enable-ehabi -arm-enable-ehabi-descriptors < %s | FileCheck %s +; RUN: llc < %s | FileCheck %s target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:64:128-a0:0:64-n32-S64" target triple = "armv7-none-linux-gnueabi" Index: test/CodeGen/ARM/ehabi-no-landingpad.ll =================================================================== --- test/CodeGen/ARM/ehabi-no-landingpad.ll +++ test/CodeGen/ARM/ehabi-no-landingpad.ll @@ -1,5 +1,4 @@ -; RUN: llc < %s -mtriple=armv7-unknown-linux-gnueabi \ -; RUN: -arm-enable-ehabi -arm-enable-ehabi-descriptors | FileCheck %s +; RUN: llc < %s -mtriple=armv7-unknown-linux-gnueabi | FileCheck %s target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:64:128-a0:0:64-n32-S64" target triple = "armv7-unknown-linux-gnueabi" Index: test/CodeGen/ARM/ehabi-unwind.ll =================================================================== --- test/CodeGen/ARM/ehabi-unwind.ll +++ test/CodeGen/ARM/ehabi-unwind.ll @@ -1,8 +1,7 @@ ; Test that the EHABI unwind instruction generator does not encounter any ; unfamiliar instructions. -; RUN: llc < %s -mtriple=thumbv7 -arm-enable-ehabi -disable-fp-elim -; RUN: llc < %s -mtriple=thumbv7 -arm-enable-ehabi -; RUN: llc < %s -mtriple=thumbv7 -arm-enable-ehabi -arm-enable-ehabi-descriptors +; RUN: llc < %s -mtriple=thumbv7 -disable-fp-elim +; RUN: llc < %s -mtriple=thumbv7 define void @_Z1fv() nounwind { entry: Index: test/CodeGen/ARM/ehabi.ll =================================================================== --- test/CodeGen/ARM/ehabi.ll +++ test/CodeGen/ARM/ehabi.ll @@ -19,22 +19,18 @@ ; (4) armv7 without -disable-fp-elim ; RUN: llc -mtriple arm-unknown-linux-gnueabi \ -; RUN: -arm-enable-ehabi -arm-enable-ehabi-descriptors \ ; RUN: -disable-fp-elim -filetype=asm -o - %s \ ; RUN: | FileCheck %s --check-prefix=CHECK-FP ; RUN: llc -mtriple arm-unknown-linux-gnueabi \ -; RUN: -arm-enable-ehabi -arm-enable-ehabi-descriptors \ ; RUN: -filetype=asm -o - %s \ ; RUN: | FileCheck %s --check-prefix=CHECK-FP-ELIM ; RUN: llc -mtriple armv7-unknown-linux-gnueabi \ -; RUN: -arm-enable-ehabi -arm-enable-ehabi-descriptors \ ; RUN: -disable-fp-elim -filetype=asm -o - %s \ ; RUN: | FileCheck %s --check-prefix=CHECK-V7-FP ; RUN: llc -mtriple armv7-unknown-linux-gnueabi \ -; RUN: -arm-enable-ehabi -arm-enable-ehabi-descriptors \ ; RUN: -filetype=asm -o - %s \ ; RUN: | FileCheck %s --check-prefix=CHECK-V7-FP-ELIM Index: test/CodeGen/ARM/setcc-sentinals.ll =================================================================== --- test/CodeGen/ARM/setcc-sentinals.ll +++ test/CodeGen/ARM/setcc-sentinals.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -mcpu=cortex-a8 -march=arm -asm-verbose=false | FileCheck %s +; RUN: llc < %s -mcpu=cortex-a8 -march=arm -asm-verbose=false -arm-disable-ehabi | FileCheck %s define zeroext i1 @test0(i32 %x) nounwind { ; CHECK-LABEL: test0: Index: test/CodeGen/Thumb2/constant-islands.ll =================================================================== --- test/CodeGen/Thumb2/constant-islands.ll +++ test/CodeGen/Thumb2/constant-islands.ll @@ -1,7 +1,7 @@ -; RUN: llc < %s -march=arm -mcpu=cortex-a8 -O0 -filetype=obj -o %t.o -; RUN: llc < %s -march=thumb -mcpu=cortex-a8 -O0 -filetype=obj -o %t.o -; RUN: llc < %s -march=arm -mcpu=cortex-a8 -O2 -filetype=obj -verify-machineinstrs -o %t.o -; RUN: llc < %s -march=thumb -mcpu=cortex-a8 -O2 -filetype=obj -verify-machineinstrs -o %t.o +; RUN: llc < %s -march=arm -mcpu=cortex-a8 -O0 -filetype=obj -o %t.o -arm-disable-ehabi +; RUN: llc < %s -march=thumb -mcpu=cortex-a8 -O0 -filetype=obj -o %t.o -arm-disable-ehabi +; RUN: llc < %s -march=arm -mcpu=cortex-a8 -O2 -filetype=obj -verify-machineinstrs -o %t.o -arm-disable-ehabi +; RUN: llc < %s -march=thumb -mcpu=cortex-a8 -O2 -filetype=obj -verify-machineinstrs -o %t.o -arm-disable-ehabi target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:32:64-v128:32:128-a0:0:32-n32-S32" target triple = "thumbv7-apple-ios" Index: test/MC/ARM/data-in-code.ll =================================================================== --- test/MC/ARM/data-in-code.ll +++ test/MC/ARM/data-in-code.ll @@ -1,8 +1,8 @@ -;; RUN: llc -O0 -verify-machineinstrs -fast-isel-abort \ +;; RUN: llc -O0 -verify-machineinstrs -fast-isel-abort -arm-disable-ehabi \ ;; RUN: -mtriple=armv7-linux-gnueabi -filetype=obj %s -o - | \ ;; RUN: llvm-readobj -t | FileCheck -check-prefix=ARM %s -;; RUN: llc -O0 -verify-machineinstrs -fast-isel-abort \ +;; RUN: llc -O0 -verify-machineinstrs -fast-isel-abort -arm-disable-ehabi \ ;; RUN: -mtriple=thumbv7-linux-gnueabi -filetype=obj %s -o - | \ ;; RUN: llvm-readobj -t | FileCheck -check-prefix=TMB %s Index: test/MC/ARM/elf-thumbfunc-reloc.ll =================================================================== --- test/MC/ARM/elf-thumbfunc-reloc.ll +++ test/MC/ARM/elf-thumbfunc-reloc.ll @@ -32,6 +32,10 @@ ; CHECK-NEXT: Section (2) .rel.text { ; CHECK-NEXT: 0x8 R_ARM_THM_CALL foo 0x0 ; CHECK-NEXT: } +; CHECK-NEXT: Section (7) .rel.ARM.exidx { +; CHECK-NEXT: 0x0 R_ARM_PREL31 .text 0x0 +; CHECK-NEXT: 0x8 R_ARM_PREL31 .text 0x0 +; CHECK-NEXT: } ; CHECK-NEXT: ] ; make sure foo is thumb function: bit 0 = 1