Index: include/clang/Basic/BuiltinsPPC.def =================================================================== --- include/clang/Basic/BuiltinsPPC.def +++ include/clang/Basic/BuiltinsPPC.def @@ -379,6 +379,13 @@ BUILTIN(__builtin_vsx_xviexpdp, "V2dV2ULLiV2ULLi", "") BUILTIN(__builtin_vsx_xviexpsp, "V4fV4UiV4Ui", "") +BUILTIN(__builtin_vsx_xvxexpdp, "V2ULLiV2d", "") +BUILTIN(__builtin_vsx_xvxexpsp, "V4UiV4f", "") +BUILTIN(__builtin_vsx_xvxsigdp, "V2ULLiV2d", "") +BUILTIN(__builtin_vsx_xvxsigsp, "V4UiV4f", "") + +BUILTIN(__builtin_vsx_xvtstdcdp, "V2ULLiV2dIi", "") +BUILTIN(__builtin_vsx_xvtstdcsp, "V4UiV4fIi", "") // HTM builtins BUILTIN(__builtin_tbegin, "UiUIi", "") Index: lib/Headers/altivec.h =================================================================== --- lib/Headers/altivec.h +++ lib/Headers/altivec.h @@ -34,6 +34,25 @@ #define __CR6_LT 2 #define __CR6_LT_REV 3 +/* Constants for vec_test_data_class */ +#define __VEC_CLASS_FP_SUBNORMAL_N (1 << 0) +#define __VEC_CLASS_FP_SUBNORMAL_P (1 << 1) +#define __VEC_CLASS_FP_SUBNORMAL (__VEC_CLASS_FP_SUBNORMAL_P | \ + __VEC_CLASS_FP_SUBNORMAL_N) +#define __VEC_CLASS_FP_ZERO_N (1<<2) +#define __VEC_CLASS_FP_ZERO_P (1<<3) +#define __VEC_CLASS_FP_ZERO (__VEC_CLASS_FP_ZERO_P | \ + __VEC_CLASS_FP_ZERO_N) +#define __VEC_CLASS_FP_INFINITY_N (1<<4) +#define __VEC_CLASS_FP_INFINITY_P (1<<5) +#define __VEC_CLASS_FP_INFINITY (__VEC_CLASS_FP_INFINITY_P | \ + __VEC_CLASS_FP_INFINITY_N) +#define __VEC_CLASS_FP_NAN (1<<6) +#define __VEC_CLASS_FP_NOT_NORMAL (__VEC_CLASS_FP_NAN | \ + __VEC_CLASS_FP_SUBNORMAL | \ + __VEC_CLASS_FP_ZERO | \ + __VEC_CLASS_FP_INFINITY) + #define __ATTRS_o_ai __attribute__((__overloadable__, __always_inline__)) static __inline__ vector signed char __ATTRS_o_ai vec_perm( @@ -11873,6 +11892,34 @@ return __a[__b]; } +#ifdef __POWER9_VECTOR__ + +/* vec_extract_exp */ + +static __inline__ vector unsigned int __ATTRS_o_ai +vec_extract_exp(vector float __a) { + return __builtin_vsx_xvxexpsp(__a); +} + +static __inline__ vector unsigned long long __ATTRS_o_ai +vec_extract_exp(vector double __a) { + return __builtin_vsx_xvxexpdp(__a); +} + +/* vec_extract_sig */ + +static __inline__ vector unsigned int __ATTRS_o_ai +vec_extract_sig(vector float __a) { + return __builtin_vsx_xvxsigsp(__a); +} + +static __inline__ vector unsigned long long __ATTRS_o_ai +vec_extract_sig (vector double __a) { + return __builtin_vsx_xvxsigdp(__a); +} + +#endif /* __POWER9_VECTOR__ */ + /* vec_insert */ static __inline__ vector signed char __ATTRS_o_ai @@ -15577,6 +15624,17 @@ } #endif /* END __POWER8_VECTOR__ && __powerpc64__ */ +#ifdef __POWER9_VECTOR__ +#define vec_test_data_class(__a, __b) \ + _Generic((__a), \ + vector float: \ + (vector bool int)__builtin_vsx_xvtstdcsp((__a), (__b)), \ + vector double: \ + (vector bool long long)__builtin_vsx_xvtstdcdp((__a), (__b)) \ + ) + +#endif /* #ifdef __POWER9_VECTOR__ */ + #undef __ATTRS_o_ai #endif /* __ALTIVEC_H */ Index: test/CodeGen/builtins-ppc-p9vector.c =================================================================== --- test/CodeGen/builtins-ppc-p9vector.c +++ test/CodeGen/builtins-ppc-p9vector.c @@ -827,4 +827,46 @@ // CHECK-NEXT: ret <16 x i8> return vec_srv (vuca, vucb); } +vector unsigned int test74(void) { +// CHECK-BE: @llvm.ppc.vsx.xvxexpsp(<4 x float> {{.+}}) +// CHECK-BE-NEXT: ret <4 x i32> +// CHECK: @llvm.ppc.vsx.xvxexpsp(<4 x float> {{.+}}) +// CHECK-NEXT: ret <4 x i32> + return vec_extract_exp(vfa); +} +vector unsigned long long test75(void) { +// CHECK-BE: @llvm.ppc.vsx.xvxexpdp(<2 x double> {{.+}}) +// CHECK-BE-NEXT: ret <2 x i64> +// CHECK: @llvm.ppc.vsx.xvxexpdp(<2 x double> {{.+}}) +// CHECK-NEXT: ret <2 x i64> + return vec_extract_exp(vda); +} +vector unsigned int test76(void) { +// CHECK-BE: @llvm.ppc.vsx.xvxsigsp(<4 x float> {{.+}}) +// CHECK-BE-NEXT: ret <4 x i32> +// CHECK: @llvm.ppc.vsx.xvxsigsp(<4 x float> {{.+}}) +// CHECK-NEXT: ret <4 x i32> + return vec_extract_sig(vfa); +} +vector unsigned long long test77(void) { +// CHECK-BE: @llvm.ppc.vsx.xvxsigdp(<2 x double> {{.+}}) +// CHECK-BE-NEXT: ret <2 x i64> +// CHECK: @llvm.ppc.vsx.xvxsigdp(<2 x double> {{.+}}) +// CHECK-NEXT: ret <2 x i64> + return vec_extract_sig(vda); +} +vector bool int test78(void) { +// CHECK-BE: @llvm.ppc.vsx.xvtstdcsp(<4 x float> {{.+}}, i32 127) +// CHECK-BE-NEXT: ret <4 x i32> +// CHECK: @llvm.ppc.vsx.xvtstdcsp(<4 x float> {{.+}}, i32 127) +// CHECK-NEXT: ret <4 x i32> + return vec_test_data_class(vfa, __VEC_CLASS_FP_NOT_NORMAL); +} +vector bool long long test79(void) { +// CHECK-BE: @llvm.ppc.vsx.xvtstdcdp(<2 x double> {{.+}}, i32 127) +// CHECK-BE_NEXT: ret <2 x i64 +// CHECK: @llvm.ppc.vsx.xvtstdcdp(<2 x double> {{.+}}, i32 127) +// CHECK-NEXT: ret <2 x i64> + return vec_test_data_class(vda, __VEC_CLASS_FP_NOT_NORMAL); +}