Index: include/llvm/IR/IntrinsicsPowerPC.td
===================================================================
--- include/llvm/IR/IntrinsicsPowerPC.td
+++ include/llvm/IR/IntrinsicsPowerPC.td
@@ -693,6 +693,17 @@
 def int_ppc_altivec_crypto_vpmsumd :
             PowerPC_Vec_DDD_Intrinsic<"crypto_vpmsumd">;
 
+def int_ppc_altivec_vabsdub :
+      PowerPC_Vec_Intrinsic<"vabsdub", [llvm_v16i8_ty],
+                            [llvm_v16i8_ty, llvm_v16i8_ty], [IntrNoMem]>;
+def int_ppc_altivec_vabsduh :
+      PowerPC_Vec_Intrinsic<"vabsduh", [llvm_v8i16_ty],
+                            [llvm_v8i16_ty, llvm_v8i16_ty], [IntrNoMem]>;
+def int_ppc_altivec_vabsduw :
+      PowerPC_Vec_Intrinsic<"vabsduw", [llvm_v4i32_ty],
+                            [llvm_v4i32_ty, llvm_v4i32_ty], [IntrNoMem]>;
+
+
 //===----------------------------------------------------------------------===//
 // PowerPC VSX Intrinsic Definitions.
 
Index: lib/Target/PowerPC/PPCInstrAltivec.td
===================================================================
--- lib/Target/PowerPC/PPCInstrAltivec.td
+++ lib/Target/PowerPC/PPCInstrAltivec.td
@@ -451,6 +451,7 @@
                    [(int_ppc_altivec_stvxl v4i32:$rS, xoaddr:$dst)]>;
 }
 
+
 let PPC970_Unit = 5 in {  // VALU Operations.
 // VA-Form instructions.  3-input AltiVec ops.
 let isCommutable = 1 in {
@@ -1405,4 +1406,15 @@
 // Decimal (Unsigned) Truncate
 def BCDTRUNCo :  VX_VT5_VA5_VB5_PS1_XO9_o<257, "bcdtrunc." , []>;
 def BCDUTRUNCo : VX_VT5_VA5_VB5_XO9_o    <321, "bcdutrunc.", []>;
+
+// Absolute Difference
+def VABSDUB : VXForm_1<1027, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vB),
+                      "vabsdub $vD, $vA, $vB", IIC_VecGeneral,
+                      [(set v16i8:$vD, (int_ppc_altivec_vabsdub v16i8:$vA, v16i8:$vB))]>;
+def VABSDUH : VXForm_1<1091, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vB),
+                       "vabsduh $vD, $vA, $vB", IIC_VecGeneral,
+                       [(set v8i16:$vD, (int_ppc_altivec_vabsduh v8i16:$vA, v8i16:$vB))]>;
+def VABSDUW : VXForm_1<1155, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vB),
+                      "vabsduw $vD, $vA, $vB", IIC_VecGeneral,
+                      [(set v4i32:$vD, (int_ppc_altivec_vabsduw v4i32:$vA, v4i32:$vB))]>;
 } // end HasP9Altivec
Index: test/CodeGen/PowerPC/vec_absd.ll
===================================================================
--- /dev/null
+++ test/CodeGen/PowerPC/vec_absd.ll
@@ -0,0 +1,40 @@
+; RUN: llc -verify-machineinstrs -mcpu=pwr9 -mtriple=powerpc64-unknown-linux-gnu -mattr=+altivec < %s | FileCheck %s
+; RUN: llc -verify-machineinstrs -mcpu=pwr9 -mtriple=powerpc64le-unknown-linux-gnu -mattr=+altivec < %s | FileCheck %s
+
+; Check the vabsd* instructions that were added in PowerISA V3.0
+
+; Function Attrs: nounwind readnone
+declare <16 x i8> @llvm.ppc.altivec.vabsdub(<16 x i8>, <16 x i8>)
+
+; Function Attrs: nounwind readnone
+declare <8 x i16> @llvm.ppc.altivec.vabsduh(<8 x i16>, <8 x i16>)
+
+; Function Attrs: nounwind readnone
+declare <4 x i32> @llvm.ppc.altivec.vabsduw(<4 x i32>, <4 x i32>)
+
+define <16 x i8> @test_byte(<16 x i8> %a, <16 x i8> %b) {
+entry:
+  %res = call <16 x i8> @llvm.ppc.altivec.vabsdub(<16 x i8> %a, <16 x i8> %b)
+  ret <16 x i8> %res
+; CHECK-LABEL: @test_byte
+; CHECK: vabsdub
+; CHECK blr
+}
+
+define <8 x i16> @test_half(<8 x i16> %a, <8 x i16> %b) {
+entry:
+  %res = call <8 x i16> @llvm.ppc.altivec.vabsduh(<8 x i16> %a, <8 x i16> %b)
+  ret <8 x i16> %res
+; CHECK-LABEL: @test_half
+; CHECK: vabsduh
+; CHECK blr
+}
+
+define <4 x i32> @test_word(<4 x i32> %a, <4 x i32> %b) {
+entry:
+  %res = call <4 x i32> @llvm.ppc.altivec.vabsduw(<4 x i32> %a, <4 x i32> %b)
+  ret <4 x i32> %res
+; CHECK-LABEL: @test_word
+; CHECK: vabsduw
+; CHECK: blr
+}
Index: test/MC/Disassembler/PowerPC/ppc64-encoding-p9vector.txt
===================================================================
--- /dev/null
+++ test/MC/Disassembler/PowerPC/ppc64-encoding-p9vector.txt
@@ -0,0 +1,10 @@
+# RUN: llvm-mc --disassemble %s -triple powerpc64-unknown-unknown -mcpu=pwr9  | FileCheck %s
+
+#CHECK: vabsdub 2, 3, 4
+0x10 0x43 0x24 0x03
+
+#CHECK vabsduh 2, 3, 4
+0x10 0x43 0x24 0x43
+
+#CHECK vabsduw 2, 3, 4
+0x10 0x43 0x24 0x83
Index: test/MC/PowerPC/ppc64-encoding-p9vector.s
===================================================================
--- /dev/null
+++ test/MC/PowerPC/ppc64-encoding-p9vector.s
@@ -0,0 +1,14 @@
+# RUN: llvm-mc -triple powerpc64-unknown-unknown --show-encoding %s | FileCheck -check-prefix=CHECK-BE %s
+# RUN: llvm-mc -triple powerpc64le-unknown-unknown --show-encoding %s | FileCheck -check-prefix=CHECK-LE %s
+
+# CHECK-BE: vabsdub 2, 3, 4                # encoding: [0x10,0x43,0x24,0x03]
+# CHECK-LE: vabsdub 2, 3, 4                # encoding: [0x03,0x24,0x43,0x10]
+            vabsdub 2, 3, 4
+
+# CHECK-BE: vabsduh 2, 3, 4                # encoding: [0x10,0x43,0x24,0x43]
+# CHECK-LE: vabsduh 2, 3, 4                # encoding: [0x43,0x24,0x43,0x10]
+            vabsduh 2, 3, 4
+
+# CHECK-BE: vabsduw 2, 3, 4                # encoding: [0x10,0x43,0x24,0x83]
+# CHECK-LE: vabsduw 2, 3, 4                # encoding: [0x83,0x24,0x43,0x10]
+            vabsduw 2, 3, 4