Index: lib/Target/AMDGPU/SIInsertWaits.cpp =================================================================== --- lib/Target/AMDGPU/SIInsertWaits.cpp +++ lib/Target/AMDGPU/SIInsertWaits.cpp @@ -93,6 +93,9 @@ bool LastInstWritesM0; + /// Whether or not we have flat operations outstanding. + bool IsFlatOutstanding; + /// \brief Whether the machine function returns void bool ReturnsVoid; @@ -294,6 +297,9 @@ Counters Limit = ZeroCounts; unsigned Sum = 0; + if (TII->isFLAT(*I)) + IsFlatOutstanding = true; + for (unsigned i = 0; i < 3; ++i) { LastIssued.Array[i] += Increment.Array[i]; if (Increment.Array[i]) @@ -368,8 +374,9 @@ // Figure out if the async instructions execute in order bool Ordered[3]; - // VM_CNT is always ordered - Ordered[0] = true; + // VM_CNT is always ordered except when there are flat instructions, which + // can return out of order. + Ordered[0] = !IsFlatOutstanding; // EXP_CNT is unordered if we have both EXP & VM-writes Ordered[1] = ExpInstrTypesSeen == 3; @@ -419,6 +426,7 @@ LastOpcodeType = OTHER; LastInstWritesM0 = false; + IsFlatOutstanding = true; return true; } @@ -532,6 +540,7 @@ LastIssued = ZeroCounts; LastOpcodeType = OTHER; LastInstWritesM0 = false; + IsFlatOutstanding = false; ReturnsVoid = MF.getInfo()->returnsVoid(); memset(&UsedRegs, 0, sizeof(UsedRegs)); Index: test/CodeGen/MIR/AMDGPU/waitcnt.mir =================================================================== --- /dev/null +++ test/CodeGen/MIR/AMDGPU/waitcnt.mir @@ -0,0 +1,24 @@ +# RUN: llc -march=amdgcn -mcpu=fiji -run-pass si-insert-waits %s -o - | FileCheck %s + +--- | + define void @flat_zero_waitcnt() { ret void } +... +--- + +# CHECK-LABEL: name: flat_zero_waitcnt + +# CHECK-LABEL: bb.0: +# CHECK: FLAT_LOAD_DWORD +# CHECK: FLAT_LOAD_DWORDX4 +# s_waitcnt vmcnt(0) lgkmcnt(0) +# CHECK: S_WAITCNT 112 + +name: flat_zero_waitcnt + +body: | + bb.0: + %vgpr0 = FLAT_LOAD_DWORD %vgpr1_vgpr2, 0, 0, 0, implicit %exec, implicit %flat_scr + %vgpr3_vgpr4_vgpr5_vgpr6 = FLAT_LOAD_DWORDX4 %vgpr7_vgpr8, 0, 0, 0, implicit %exec, implicit %flat_scr + %vgpr0 = V_MOV_B32_e32 %vgpr1, implicit %exec + S_ENDPGM +...