Index: include/llvm/IR/IntrinsicsPowerPC.td
===================================================================
--- include/llvm/IR/IntrinsicsPowerPC.td
+++ include/llvm/IR/IntrinsicsPowerPC.td
@@ -782,6 +782,12 @@
 def int_ppc_vsx_xxleqv :
       PowerPC_VSX_Intrinsic<"xxleqv", [llvm_v4i32_ty],
                             [llvm_v4i32_ty, llvm_v4i32_ty], [IntrNoMem]>;
+def int_ppc_vsx_xviexpdp :
+      PowerPC_VSX_Intrinsic<"xviexpdp",[llvm_v2f64_ty],
+                            [llvm_v2i64_ty, llvm_v2i64_ty],[IntrNoMem]>;
+def int_ppc_vsx_xviexpsp :
+      PowerPC_VSX_Intrinsic<"xviexpsp",[llvm_v4f32_ty],
+                            [llvm_v4i32_ty, llvm_v4i32_ty],[IntrNoMem]>;
 }
 
 //===----------------------------------------------------------------------===//
Index: lib/Target/PowerPC/PPCInstrVSX.td
===================================================================
--- lib/Target/PowerPC/PPCInstrVSX.td
+++ lib/Target/PowerPC/PPCInstrVSX.td
@@ -2191,9 +2191,9 @@
 
   // Vector Insert Exponent DP/SP
   def XVIEXPDP : XX3_XT5_XA5_XB5<60, 248, "xviexpdp", vsrc, vsrc, vsrc,
-                                 IIC_VecFP, []>;
+    IIC_VecFP, [(set v2f64: $XT,(int_ppc_vsx_xviexpdp v2i64:$XA, v2i64:$XB))]>;
   def XVIEXPSP : XX3_XT5_XA5_XB5<60, 216, "xviexpsp", vsrc, vsrc, vsrc,
-                                 IIC_VecFP, []>;
+    IIC_VecFP, [(set v4f32: $XT,(int_ppc_vsx_xviexpsp v4i32:$XA, v4i32:$XB))]>;
 
   // Vector Extract Exponent/Significand DP/SP
   def XVXEXPDP : XX2_XT6_XO5_XB6<60,  0, 475, "xvxexpdp", vsrc, []>;
Index: test/CodeGen/PowerPC/vsx-p9.ll
===================================================================
--- test/CodeGen/PowerPC/vsx-p9.ll
+++ test/CodeGen/PowerPC/vsx-p9.ll
@@ -143,4 +143,28 @@
   ret void
 }
 
+; Function Attrs: nounwind readnone
+define <4 x float> @testXVIEXPSP(<4 x i32> %a, <4 x i32> %b) {
+entry:
+  %0 = tail call <4 x float> @llvm.ppc.vsx.xviexpsp(<4 x i32> %a, <4 x i32> %b)
+  ret <4 x float> %0
+; CHECK-LABEL: testXVIEXPSP
+; CHECK: xviexpsp 34, 34, 35
+; CHECK: blr
+}
+; Function Attrs: nounwind readnone
+declare <4 x float> @llvm.ppc.vsx.xviexpsp(<4 x i32>, <4 x i32>)
+
+; Function Attrs: nounwind readnone
+define <2 x double> @testXVIEXPDP(<2 x i64> %a, <2 x i64> %b) {
+entry:
+  %0 = tail call <2 x double> @llvm.ppc.vsx.xviexpdp(<2 x i64> %a, <2 x i64> %b)
+  ret <2 x double> %0
+; CHECK-LABEL: testXVIEXPDP
+; CHECK: xviexpdp 34, 34, 35
+; CHECK: blr
+}
+; Function Attrs: nounwind readnone
+declare <2 x double> @llvm.ppc.vsx.xviexpdp(<2 x i64>, <2 x i64>)
+
 declare void @sink(...)