Index: llvm/trunk/test/CodeGen/AArch64/aarch64-fix-cortex-a53-835769.ll =================================================================== --- llvm/trunk/test/CodeGen/AArch64/aarch64-fix-cortex-a53-835769.ll +++ llvm/trunk/test/CodeGen/AArch64/aarch64-fix-cortex-a53-835769.ll @@ -4,7 +4,7 @@ ; test cases have been minimized as much as possible, but still most of the test ; cases could break if instruction scheduling heuristics for cortex-a53 change ; RUN: llc < %s -mcpu=cortex-a53 -aarch64-fix-cortex-a53-835769=1 -stats 2>&1 \ -; RUN: | FileCheck %s --check-prefix CHECK +; RUN: | FileCheck %s ; RUN: llc < %s -mcpu=cortex-a53 -aarch64-fix-cortex-a53-835769=0 -stats 2>&1 \ ; RUN: | FileCheck %s --check-prefix CHECK-NOWORKAROUND ; The following run lines are just to verify whether or not this pass runs by Index: llvm/trunk/test/CodeGen/ARM/build-attributes-fn-attr0.ll =================================================================== --- llvm/trunk/test/CodeGen/ARM/build-attributes-fn-attr0.ll +++ llvm/trunk/test/CodeGen/ARM/build-attributes-fn-attr0.ll @@ -5,7 +5,7 @@ ; true when the compilation unit does not have any functions (i.e. the ; attributes are consistent), which is what we check with this regression test. -; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15 | FileCheck %s --check-prefix=CHECK +; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15 | FileCheck %s ; CHECK: .eabi_attribute 20, 2 ; CHECK: .eabi_attribute 21, 0 Index: llvm/trunk/test/CodeGen/ARM/build-attributes-fn-attr1.ll =================================================================== --- llvm/trunk/test/CodeGen/ARM/build-attributes-fn-attr1.ll +++ llvm/trunk/test/CodeGen/ARM/build-attributes-fn-attr1.ll @@ -4,7 +4,7 @@ ; attributes values. This checks the "default" behaviour when these FP function ; attributes are not set at all. -; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15 | FileCheck %s --check-prefix=CHECK +; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15 | FileCheck %s ; CHECK: .eabi_attribute 20, 1 ; CHECK: .eabi_attribute 21, 1 Index: llvm/trunk/test/CodeGen/ARM/build-attributes-fn-attr2.ll =================================================================== --- llvm/trunk/test/CodeGen/ARM/build-attributes-fn-attr2.ll +++ llvm/trunk/test/CodeGen/ARM/build-attributes-fn-attr2.ll @@ -4,7 +4,7 @@ ; functions have consistent function attributes values. ; Here we test correct output for no-trapping-math=false -; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15 | FileCheck %s --check-prefix=CHECK +; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15 | FileCheck %s ; CHECK: .eabi_attribute 21, 1 Index: llvm/trunk/test/CodeGen/ARM/build-attributes-fn-attr3.ll =================================================================== --- llvm/trunk/test/CodeGen/ARM/build-attributes-fn-attr3.ll +++ llvm/trunk/test/CodeGen/ARM/build-attributes-fn-attr3.ll @@ -4,7 +4,7 @@ ; functions have consistent function attributes values. ; Here we check values no-trapping-math=true and denormal-fp-math=ieee. -; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15 | FileCheck %s --check-prefix=CHECK +; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15 | FileCheck %s ; CHECK: .eabi_attribute 20, 1 ; CHECK: .eabi_attribute 21, 0 Index: llvm/trunk/test/CodeGen/ARM/build-attributes-fn-attr4.ll =================================================================== --- llvm/trunk/test/CodeGen/ARM/build-attributes-fn-attr4.ll +++ llvm/trunk/test/CodeGen/ARM/build-attributes-fn-attr4.ll @@ -4,7 +4,7 @@ ; attributes values. ; Here we check the denormal-fp-math=positive-zero value. -; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15 | FileCheck %s --check-prefix=CHECK +; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15 | FileCheck %s ; CHECK: .eabi_attribute 20, 0 Index: llvm/trunk/test/CodeGen/ARM/build-attributes-fn-attr6.ll =================================================================== --- llvm/trunk/test/CodeGen/ARM/build-attributes-fn-attr6.ll +++ llvm/trunk/test/CodeGen/ARM/build-attributes-fn-attr6.ll @@ -4,7 +4,7 @@ ; functions have consistent function attributes values. Here we check two ; functions have inconsistent values, and that a default is returned. -; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15 | FileCheck %s --check-prefix=CHECK +; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15 | FileCheck %s ; CHECK: .eabi_attribute 20, 1 Index: llvm/trunk/test/CodeGen/ARM/smml.ll =================================================================== --- llvm/trunk/test/CodeGen/ARM/smml.ll +++ llvm/trunk/test/CodeGen/ARM/smml.ll @@ -1,4 +1,4 @@ -; RUN: llc -mtriple=arm-eabi %s -o - | FileCheck %s -check-prefix=CHECK +; RUN: llc -mtriple=arm-eabi %s -o - | FileCheck %s ; RUN: llc -mtriple=armv6-eabi %s -o - | FileCheck %s -check-prefix=CHECK-V6 ; RUN: llc -mtriple=armv7-eabi %s -o - | FileCheck %s -check-prefix=CHECK-V7 ; RUN: llc -mtriple=thumb-eabi %s -o - | FileCheck %s -check-prefix=CHECK-THUMB Index: llvm/trunk/test/CodeGen/X86/bitcast-i256.ll =================================================================== --- llvm/trunk/test/CodeGen/X86/bitcast-i256.ll +++ llvm/trunk/test/CodeGen/X86/bitcast-i256.ll @@ -1,4 +1,4 @@ -; RUN: llc -mtriple=x86_64-unknown-unknown -mcpu=core-avx-i < %s | FileCheck %s --check-prefix CHECK +; RUN: llc -mtriple=x86_64-unknown-unknown -mcpu=core-avx-i < %s | FileCheck %s define i256 @foo(<8 x i32> %a) { %r = bitcast <8 x i32> %a to i256 Index: llvm/trunk/test/CodeGen/X86/code_placement_loop_rotation3.ll =================================================================== --- llvm/trunk/test/CodeGen/X86/code_placement_loop_rotation3.ll +++ llvm/trunk/test/CodeGen/X86/code_placement_loop_rotation3.ll @@ -1,4 +1,4 @@ -; RUN: llc -mcpu=corei7 -mtriple=x86_64-linux -force-precise-rotation-cost < %s | FileCheck %s -check-prefix=CHECK +; RUN: llc -mcpu=corei7 -mtriple=x86_64-linux -force-precise-rotation-cost < %s | FileCheck %s define void @bar() { ; Test that all edges in the loop chain are fall through with profile data. Index: llvm/trunk/test/CodeGen/X86/dagcombine-buildvector.ll =================================================================== --- llvm/trunk/test/CodeGen/X86/dagcombine-buildvector.ll +++ llvm/trunk/test/CodeGen/X86/dagcombine-buildvector.ll @@ -1,5 +1,5 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc < %s -mtriple=i686-unknown -mcpu=penryn | FileCheck %s --check-prefix=CHECK +; RUN: llc < %s -mtriple=i686-unknown -mcpu=penryn | FileCheck %s ; Shows a dag combine bug that will generate an illegal build vector ; with v2i64 build_vector i32, i32. Index: llvm/trunk/test/CodeGen/X86/x32-movtopush64.ll =================================================================== --- llvm/trunk/test/CodeGen/X86/x32-movtopush64.ll +++ llvm/trunk/test/CodeGen/X86/x32-movtopush64.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -mtriple=x86_64-linux-gnux32 | FileCheck %s -check-prefix=CHECK +; RUN: llc < %s -mtriple=x86_64-linux-gnux32 | FileCheck %s declare void @bar(i32*, i32*, i32*, i32*, i32*, i64*, i32, i32, i32) Index: llvm/trunk/test/CodeGen/X86/xor-select-i1-combine.ll =================================================================== --- llvm/trunk/test/CodeGen/X86/xor-select-i1-combine.ll +++ llvm/trunk/test/CodeGen/X86/xor-select-i1-combine.ll @@ -1,5 +1,5 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -;RUN: llc < %s -O2 -mattr=+avx512f -mtriple=x86_64-unknown | FileCheck %s --check-prefix=CHECK +;RUN: llc < %s -O2 -mattr=+avx512f -mtriple=x86_64-unknown | FileCheck %s @n = common global i32 0, align 4 @m = common global i32 0, align 4 Index: llvm/trunk/test/Transforms/FunctionImport/inlineasm.ll =================================================================== --- llvm/trunk/test/Transforms/FunctionImport/inlineasm.ll +++ llvm/trunk/test/Transforms/FunctionImport/inlineasm.ll @@ -6,7 +6,7 @@ ; Attempt the import now, ensure below that file containing inline assembly ; is not imported from. Otherwise we would need to promote its local variable ; used in the inline assembly, which would not see the rename. -; RUN: opt -function-import -summary-file %t3.thinlto.bc %t.bc -S 2>&1 | FileCheck %s --check-prefix=CHECK +; RUN: opt -function-import -summary-file %t3.thinlto.bc %t.bc -S 2>&1 | FileCheck %s define i32 @main() #0 { entry: Index: llvm/trunk/test/Transforms/Inline/always-inline.ll =================================================================== --- llvm/trunk/test/Transforms/Inline/always-inline.ll +++ llvm/trunk/test/Transforms/Inline/always-inline.ll @@ -6,7 +6,7 @@ ; ; The new pass manager doesn't re-use any threshold based infrastructure for ; the always inliner, but test that we get the correct result. -; RUN: opt < %s -passes=always-inline -S | FileCheck %s --check-prefix=CHECK +; RUN: opt < %s -passes=always-inline -S | FileCheck %s define i32 @inner1() alwaysinline { ret i32 1 Index: llvm/trunk/test/Transforms/SimplifyCFG/ARM/switch-to-lookup-table-constant-expr.ll =================================================================== --- llvm/trunk/test/Transforms/SimplifyCFG/ARM/switch-to-lookup-table-constant-expr.ll +++ llvm/trunk/test/Transforms/SimplifyCFG/ARM/switch-to-lookup-table-constant-expr.ll @@ -1,4 +1,4 @@ -; RUN: opt -S -simplifycfg < %s | FileCheck %s --check-prefix=CHECK +; RUN: opt -S -simplifycfg < %s | FileCheck %s target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64" target triple = "armv7a--none-eabi"