Index: lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
===================================================================
--- lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
+++ lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
@@ -548,7 +548,7 @@
   // register.
   ProgInfo.FloatMode = getFPMode(MF);
 
-  ProgInfo.IEEEMode = 0;
+  ProgInfo.IEEEMode = STM.enableIEEEBit(MF);
 
   // Make clamp modifier on NaN input returns 0.
   ProgInfo.DX10Clamp = 1;
Index: lib/Target/AMDGPU/AMDGPUSubtarget.h
===================================================================
--- lib/Target/AMDGPU/AMDGPUSubtarget.h
+++ lib/Target/AMDGPU/AMDGPUSubtarget.h
@@ -249,6 +249,10 @@
     return DumpCode;
   }
 
+  bool enableIEEEBit(const MachineFunction &MF) const {
+    return AMDGPU::isCompute(MF.getFunction()->getCallingConv());
+  }
+
   /// Return the amount of LDS that can be used that will not restrict the
   /// occupancy lower than WaveCount.
   unsigned getMaxLocalMemSizeWithWaveCount(unsigned WaveCount) const;
Index: test/CodeGen/AMDGPU/default-fp-mode.ll
===================================================================
--- test/CodeGen/AMDGPU/default-fp-mode.ll
+++ test/CodeGen/AMDGPU/default-fp-mode.ll
@@ -2,7 +2,7 @@
 
 ; GCN-LABEL: {{^}}test_default_si:
 ; GCN: FloatMode: 192
-; GCN: IeeeMode: 0
+; GCN: IeeeMode: 1
 define void @test_default_si(float addrspace(1)* %out0, double addrspace(1)* %out1) #0 {
   store float 0.0, float addrspace(1)* %out0
   store double 0.0, double addrspace(1)* %out1
@@ -11,7 +11,7 @@
 
 ; GCN-LABEL: {{^}}test_default_vi:
 ; GCN: FloatMode: 192
-; GCN: IeeeMode: 0
+; GCN: IeeeMode: 1
 define void @test_default_vi(float addrspace(1)* %out0, double addrspace(1)* %out1) #1 {
   store float 0.0, float addrspace(1)* %out0
   store double 0.0, double addrspace(1)* %out1
@@ -20,7 +20,7 @@
 
 ; GCN-LABEL: {{^}}test_f64_denormals:
 ; GCN: FloatMode: 192
-; GCN: IeeeMode: 0
+; GCN: IeeeMode: 1
 define void @test_f64_denormals(float addrspace(1)* %out0, double addrspace(1)* %out1) #2 {
   store float 0.0, float addrspace(1)* %out0
   store double 0.0, double addrspace(1)* %out1
@@ -29,7 +29,7 @@
 
 ; GCN-LABEL: {{^}}test_f32_denormals:
 ; GCNL: FloatMode: 48
-; GCN: IeeeMode: 0
+; GCN: IeeeMode: 1
 define void @test_f32_denormals(float addrspace(1)* %out0, double addrspace(1)* %out1) #3 {
   store float 0.0, float addrspace(1)* %out0
   store double 0.0, double addrspace(1)* %out1
@@ -38,7 +38,7 @@
 
 ; GCN-LABEL: {{^}}test_f32_f64_denormals:
 ; GCN: FloatMode: 240
-; GCN: IeeeMode: 0
+; GCN: IeeeMode: 1
 define void @test_f32_f64_denormals(float addrspace(1)* %out0, double addrspace(1)* %out1) #4 {
   store float 0.0, float addrspace(1)* %out0
   store double 0.0, double addrspace(1)* %out1
@@ -47,7 +47,7 @@
 
 ; GCN-LABEL: {{^}}test_no_denormals
 ; GCN: FloatMode: 0
-; GCN: IeeeMode: 0
+; GCN: IeeeMode: 1
 define void @test_no_denormals(float addrspace(1)* %out0, double addrspace(1)* %out1) #5 {
   store float 0.0, float addrspace(1)* %out0
   store double 0.0, double addrspace(1)* %out1
Index: test/CodeGen/AMDGPU/hsa-fp-mode.ll
===================================================================
--- test/CodeGen/AMDGPU/hsa-fp-mode.ll
+++ test/CodeGen/AMDGPU/hsa-fp-mode.ll
@@ -3,7 +3,7 @@
 ; GCN-LABEL: {{^}}test_default_ci:
 ; GCN: float_mode = 192
 ; GCN: enable_dx10_clamp = 1
-; GCN: enable_ieee_mode = 0
+; GCN: enable_ieee_mode = 1
 define void @test_default_ci(float addrspace(1)* %out0, double addrspace(1)* %out1) #0 {
   store float 0.0, float addrspace(1)* %out0
   store double 0.0, double addrspace(1)* %out1
@@ -13,7 +13,7 @@
 ; GCN-LABEL: {{^}}test_default_vi:
 ; GCN: float_mode = 192
 ; GCN: enable_dx10_clamp = 1
-; GCN: enable_ieee_mode = 0
+; GCN: enable_ieee_mode = 1
 define void @test_default_vi(float addrspace(1)* %out0, double addrspace(1)* %out1) #1 {
   store float 0.0, float addrspace(1)* %out0
   store double 0.0, double addrspace(1)* %out1
@@ -23,7 +23,7 @@
 ; GCN-LABEL: {{^}}test_f64_denormals:
 ; GCN: float_mode = 192
 ; GCN: enable_dx10_clamp = 1
-; GCN: enable_ieee_mode = 0
+; GCN: enable_ieee_mode = 1
 define void @test_f64_denormals(float addrspace(1)* %out0, double addrspace(1)* %out1) #2 {
   store float 0.0, float addrspace(1)* %out0
   store double 0.0, double addrspace(1)* %out1
@@ -33,7 +33,7 @@
 ; GCN-LABEL: {{^}}test_f32_denormals:
 ; GCN: float_mode = 48
 ; GCN: enable_dx10_clamp = 1
-; GCN: enable_ieee_mode = 0
+; GCN: enable_ieee_mode = 1
 define void @test_f32_denormals(float addrspace(1)* %out0, double addrspace(1)* %out1) #3 {
   store float 0.0, float addrspace(1)* %out0
   store double 0.0, double addrspace(1)* %out1
@@ -43,7 +43,7 @@
 ; GCN-LABEL: {{^}}test_f32_f64_denormals:
 ; GCN: float_mode = 240
 ; GCN: enable_dx10_clamp = 1
-; GCN: enable_ieee_mode = 0
+; GCN: enable_ieee_mode = 1
 define void @test_f32_f64_denormals(float addrspace(1)* %out0, double addrspace(1)* %out1) #4 {
   store float 0.0, float addrspace(1)* %out0
   store double 0.0, double addrspace(1)* %out1
@@ -53,7 +53,7 @@
 ; GCN-LABEL: {{^}}test_no_denormals:
 ; GCN: float_mode = 0
 ; GCN: enable_dx10_clamp = 1
-; GCN: enable_ieee_mode = 0
+; GCN: enable_ieee_mode = 1
 define void @test_no_denormals(float addrspace(1)* %out0, double addrspace(1)* %out1) #5 {
   store float 0.0, float addrspace(1)* %out0
   store double 0.0, double addrspace(1)* %out1