Index: lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.h
===================================================================
--- lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.h
+++ lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.h
@@ -21,6 +21,7 @@
 using namespace llvm;
 
 namespace llvm {
+class FeatureBitset;
 class MCContext;
 class MCExpr;
 class MCInst;
@@ -270,8 +271,12 @@
   unsigned getRegisterListOpValue16(const MCInst &MI, unsigned OpNo,
                                     SmallVectorImpl<MCFixup> &Fixups,
                                     const MCSubtargetInfo &STI) const;
-  private:
+
+private:
   void LowerCompactBranch(MCInst& Inst) const;
+  uint64_t ComputeAvailableFeatures(const FeatureBitset &FB) const;
+  void verifyInstructionPredicates(const MCInst &MI,
+                                   uint64_t AvailableFeatures) const;
 }; // class MipsMCCodeEmitter
 } // namespace llvm.
 
Index: lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
===================================================================
--- lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
+++ lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
@@ -186,6 +186,8 @@
                   SmallVectorImpl<MCFixup> &Fixups,
                   const MCSubtargetInfo &STI) const
 {
+  verifyInstructionPredicates(MI,
+                              ComputeAvailableFeatures(STI.getFeatureBits()));
 
   // Non-pseudo instructions that get changed for direct object
   // only based on operand values.
@@ -1168,4 +1170,5 @@
   return Res >> 2;
 }
 
+#define ENABLE_INSTR_PREDICATE_VERIFIER
 #include "MipsGenMCCodeEmitter.inc"