Index: llvm/trunk/include/llvm/MC/MCExpr.h =================================================================== --- llvm/trunk/include/llvm/MC/MCExpr.h +++ llvm/trunk/include/llvm/MC/MCExpr.h @@ -266,6 +266,11 @@ VK_WebAssembly_FUNCTION, // Function table index, rather than virtual addr + VK_AMDGPU_GOTPCREL32_LO, // symbol@gotpcrel32@lo + VK_AMDGPU_GOTPCREL32_HI, // symbol@gotpcrel32@hi + VK_AMDGPU_REL32_LO, // symbol@rel32@lo + VK_AMDGPU_REL32_HI, // symbol@rel32@hi + VK_TPREL, VK_DTPREL }; Index: llvm/trunk/lib/MC/MCExpr.cpp =================================================================== --- llvm/trunk/lib/MC/MCExpr.cpp +++ llvm/trunk/lib/MC/MCExpr.cpp @@ -275,6 +275,10 @@ case VK_Hexagon_IE: return "IE"; case VK_Hexagon_IE_GOT: return "IEGOT"; case VK_WebAssembly_FUNCTION: return "FUNCTION"; + case VK_AMDGPU_GOTPCREL32_LO: return "gotpcrel32@lo"; + case VK_AMDGPU_GOTPCREL32_HI: return "gotpcrel32@hi"; + case VK_AMDGPU_REL32_LO: return "rel32@lo"; + case VK_AMDGPU_REL32_HI: return "rel32@hi"; } llvm_unreachable("Invalid variant kind"); } @@ -372,6 +376,10 @@ .Case("prel31", VK_ARM_PREL31) .Case("sbrel", VK_ARM_SBREL) .Case("tlsldo", VK_ARM_TLSLDO) + .Case("gotpcrel32@lo", VK_AMDGPU_GOTPCREL32_LO) + .Case("gotpcrel32@hi", VK_AMDGPU_GOTPCREL32_HI) + .Case("rel32@lo", VK_AMDGPU_REL32_LO) + .Case("rel32@hi", VK_AMDGPU_REL32_HI) .Default(VK_Invalid); } Index: llvm/trunk/lib/Target/AMDGPU/MCTargetDesc/AMDGPUELFObjectWriter.cpp =================================================================== --- llvm/trunk/lib/Target/AMDGPU/MCTargetDesc/AMDGPUELFObjectWriter.cpp +++ llvm/trunk/lib/Target/AMDGPU/MCTargetDesc/AMDGPUELFObjectWriter.cpp @@ -53,6 +53,14 @@ break; case MCSymbolRefExpr::VK_GOTPCREL: return ELF::R_AMDGPU_GOTPCREL; + case MCSymbolRefExpr::VK_AMDGPU_GOTPCREL32_LO: + return ELF::R_AMDGPU_GOTPCREL32_LO; + case MCSymbolRefExpr::VK_AMDGPU_GOTPCREL32_HI: + return ELF::R_AMDGPU_GOTPCREL32_HI; + case MCSymbolRefExpr::VK_AMDGPU_REL32_LO: + return ELF::R_AMDGPU_REL32_LO; + case MCSymbolRefExpr::VK_AMDGPU_REL32_HI: + return ELF::R_AMDGPU_REL32_HI; } switch (Fixup.getKind()) { Index: llvm/trunk/test/MC/AMDGPU/reloc.s =================================================================== --- llvm/trunk/test/MC/AMDGPU/reloc.s +++ llvm/trunk/test/MC/AMDGPU/reloc.s @@ -4,7 +4,11 @@ // CHECK: .rel.text { // CHECK: R_AMDGPU_ABS32_LO SCRATCH_RSRC_DWORD0 0x0 // CHECK: R_AMDGPU_ABS32_HI SCRATCH_RSRC_DWORD1 0x0 -// CHECK: R_AMDGPU_GOTPCREL global_var 0x0 +// CHECK: R_AMDGPU_GOTPCREL global_var0 0x0 +// CHECK: R_AMDGPU_GOTPCREL32_LO global_var1 0x0 +// CHECK: R_AMDGPU_GOTPCREL32_HI global_var2 0x0 +// CHECK: R_AMDGPU_REL32_LO global_var3 0x0 +// CHECK: R_AMDGPU_REL32_HI global_var4 0x0 // CHECK: R_AMDGPU_ABS32 var 0x0 // CHECK: } // CHECK: .rel.data { @@ -15,9 +19,17 @@ kernel: s_mov_b32 s0, SCRATCH_RSRC_DWORD0 s_mov_b32 s1, SCRATCH_RSRC_DWORD1 - s_mov_b32 s2, global_var@GOTPCREL - -.globl global_var + s_mov_b32 s2, global_var0@GOTPCREL + s_mov_b32 s3, global_var1@gotpcrel32@lo + s_mov_b32 s4, global_var2@gotpcrel32@hi + s_mov_b32 s5, global_var3@rel32@lo + s_mov_b32 s6, global_var4@rel32@hi + +.globl global_var0 +.globl global_var1 +.globl global_var2 +.globl global_var3 +.globl global_var4 .globl SCRATCH_RSRC_DWORD0