Index: test/CodeGen/AArch64/GlobalISel/arm64-fallback.ll
===================================================================
--- test/CodeGen/AArch64/GlobalISel/arm64-fallback.ll
+++ test/CodeGen/AArch64/GlobalISel/arm64-fallback.ll
@@ -8,15 +8,17 @@
 ; the fallback path.
 
 target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
-target triple = "aarch64-apple-ios"
+target triple = "aarch64--"
 
+; We use __fixunstfti as the common denominator for __fixunstfti on Linux and
+; ___fixunstfti on iOS
 ; ERROR: Unable to lower arguments
 ; FALLBACK: ldr q0,
-; FALLBACK-NEXT: bl ___fixunstfti
+; FALLBACK-NEXT: bl __fixunstfti
 ;
 ; FALLBACK_WITH_REPORT: warning: Instruction selection used fallback path for ABIi128
 ; FALLBACK_WITH_REPORT: ldr q0,
-; FALLBACK_WITH_REPORT-NEXT: bl ___fixunstfti
+; FALLBACK_WITH_REPORT-NEXT: bl __fixunstfti
 define i128 @ABIi128(i128 %arg1) {
   %farg1 =       bitcast i128 %arg1 to fp128 
   %res = fptoui fp128 %farg1 to i128
Index: test/CodeGen/AArch64/GlobalISel/arm64-instructionselect.mir
===================================================================
--- test/CodeGen/AArch64/GlobalISel/arm64-instructionselect.mir
+++ test/CodeGen/AArch64/GlobalISel/arm64-instructionselect.mir
@@ -1,11 +1,11 @@
-# RUN: llc -O0 -run-pass=instruction-select -verify-machineinstrs -global-isel %s -o - | FileCheck %s
+# RUN: llc -O0 -mtriple=aarch64-apple-ios -run-pass=instruction-select -verify-machineinstrs -global-isel %s -o - | FileCheck %s -check-prefix=CHECK -check-prefix=IOS
+# RUN: llc -O0 -mtriple=aarch64-linux-gnu -run-pass=instruction-select -verify-machineinstrs -global-isel %s -o - | FileCheck %s -check-prefix=CHECK -check-prefix=LINUX
 
 # Test the instruction selector.
 # As we support more instructions, we need to split this up.
 
 --- |
   target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
-  target triple = "aarch64-apple-ios"
 
   define void @add_s32_gpr() { ret void }
   define void @add_s64_gpr() { ret void }
@@ -1331,7 +1331,8 @@
   - { id: 0, class: gpr }
 
 # CHECK:  body:
-# CHECK: %0 = LOADgot @var_got
+# IOS: %0 = LOADgot @var_got
+# LINUX: %0 = MOVaddr target-flags(aarch64-page) @var_got, target-flags(aarch64-pageoff, aarch64-nc) @var_got
 body:             |
   bb.0:
     %0(p0) = G_GLOBAL_VALUE @var_got
Index: test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll
===================================================================
--- test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll
+++ test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll
@@ -3,7 +3,7 @@
 ; This file checks that the translation from llvm IR to generic MachineInstr
 ; is correct.
 target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
-target triple = "aarch64-apple-ios"
+target triple = "aarch64--"
 
 ; Tests for add.
 ; CHECK-LABEL: name: addi64
Index: test/CodeGen/AArch64/GlobalISel/arm64-regbankselect.mir
===================================================================
--- test/CodeGen/AArch64/GlobalISel/arm64-regbankselect.mir
+++ test/CodeGen/AArch64/GlobalISel/arm64-regbankselect.mir
@@ -4,7 +4,7 @@
 --- |
   ; ModuleID = 'generic-virtual-registers-type-error.mir'
   target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
-  target triple = "aarch64-apple-ios"
+  target triple = "aarch64--"
   define void @defaultMapping() {
   entry:
     ret void
Index: test/CodeGen/AArch64/GlobalISel/legalize-add.mir
===================================================================
--- test/CodeGen/AArch64/GlobalISel/legalize-add.mir
+++ test/CodeGen/AArch64/GlobalISel/legalize-add.mir
@@ -2,7 +2,7 @@
 
 --- |
   target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
-  target triple = "aarch64-apple-ios"
+  target triple = "aarch64--"
   define void @test_scalar_add_big() {
   entry:
     ret void
Index: test/CodeGen/AArch64/GlobalISel/legalize-and.mir
===================================================================
--- test/CodeGen/AArch64/GlobalISel/legalize-and.mir
+++ test/CodeGen/AArch64/GlobalISel/legalize-and.mir
@@ -2,7 +2,7 @@
 
 --- |
   target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
-  target triple = "aarch64-apple-ios"
+  target triple = "aarch64--"
   define void @test_scalar_and_small() {
   entry:
     ret void
Index: test/CodeGen/AArch64/GlobalISel/legalize-cmp.mir
===================================================================
--- test/CodeGen/AArch64/GlobalISel/legalize-cmp.mir
+++ test/CodeGen/AArch64/GlobalISel/legalize-cmp.mir
@@ -2,7 +2,7 @@
 
 --- |
   target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
-  target triple = "aarch64-apple-ios"
+  target triple = "aarch64--"
   define void @test_icmp() {
   entry:
     ret void
Index: test/CodeGen/AArch64/GlobalISel/legalize-combines.mir
===================================================================
--- test/CodeGen/AArch64/GlobalISel/legalize-combines.mir
+++ test/CodeGen/AArch64/GlobalISel/legalize-combines.mir
@@ -2,7 +2,7 @@
 
 --- |
   target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
-  target triple = "aarch64-apple-ios"
+  target triple = "aarch64--"
   define void @test_combines() {
   entry:
     ret void
Index: test/CodeGen/AArch64/GlobalISel/legalize-constant.mir
===================================================================
--- test/CodeGen/AArch64/GlobalISel/legalize-constant.mir
+++ test/CodeGen/AArch64/GlobalISel/legalize-constant.mir
@@ -2,7 +2,7 @@
 
 --- |
   target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
-  target triple = "aarch64-apple-ios"
+  target triple = "aarch64--"
   define void @test_constant() {
   entry:
     ret void
Index: test/CodeGen/AArch64/GlobalISel/legalize-div.mir
===================================================================
--- test/CodeGen/AArch64/GlobalISel/legalize-div.mir
+++ test/CodeGen/AArch64/GlobalISel/legalize-div.mir
@@ -2,7 +2,7 @@
 
 --- |
   target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
-  target triple = "aarch64-apple-ios"
+  target triple = "aarch64--"
   define void @test_div() {
   entry:
     ret void
Index: test/CodeGen/AArch64/GlobalISel/legalize-ext.mir
===================================================================
--- test/CodeGen/AArch64/GlobalISel/legalize-ext.mir
+++ test/CodeGen/AArch64/GlobalISel/legalize-ext.mir
@@ -2,7 +2,7 @@
 
 --- |
   target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
-  target triple = "aarch64-apple-ios"
+  target triple = "aarch64--"
   define void @test_ext() {
   entry:
     ret void
Index: test/CodeGen/AArch64/GlobalISel/legalize-fcmp.mir
===================================================================
--- test/CodeGen/AArch64/GlobalISel/legalize-fcmp.mir
+++ test/CodeGen/AArch64/GlobalISel/legalize-fcmp.mir
@@ -2,7 +2,7 @@
 
 --- |
   target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
-  target triple = "aarch64-apple-ios"
+  target triple = "aarch64--"
   define void @test_icmp() {
   entry:
     ret void
Index: test/CodeGen/AArch64/GlobalISel/legalize-gep.mir
===================================================================
--- test/CodeGen/AArch64/GlobalISel/legalize-gep.mir
+++ test/CodeGen/AArch64/GlobalISel/legalize-gep.mir
@@ -2,7 +2,7 @@
 
 --- |
   target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
-  target triple = "aarch64-apple-ios"
+  target triple = "aarch64--"
   define void @test_gep_small() {
   entry:
     ret void
Index: test/CodeGen/AArch64/GlobalISel/legalize-load-store.mir
===================================================================
--- test/CodeGen/AArch64/GlobalISel/legalize-load-store.mir
+++ test/CodeGen/AArch64/GlobalISel/legalize-load-store.mir
@@ -2,7 +2,7 @@
 
 --- |
   target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
-  target triple = "aarch64-apple-ios"
+  target triple = "aarch64--"
   define void @test_load(i8* %addr) {
   entry:
     ret void
Index: test/CodeGen/AArch64/GlobalISel/legalize-mul.mir
===================================================================
--- test/CodeGen/AArch64/GlobalISel/legalize-mul.mir
+++ test/CodeGen/AArch64/GlobalISel/legalize-mul.mir
@@ -2,7 +2,7 @@
 
 --- |
   target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
-  target triple = "aarch64-apple-ios"
+  target triple = "aarch64--"
   define void @test_scalar_mul_small() {
   entry:
     ret void
Index: test/CodeGen/AArch64/GlobalISel/legalize-or.mir
===================================================================
--- test/CodeGen/AArch64/GlobalISel/legalize-or.mir
+++ test/CodeGen/AArch64/GlobalISel/legalize-or.mir
@@ -2,7 +2,7 @@
 
 --- |
   target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
-  target triple = "aarch64-apple-ios"
+  target triple = "aarch64--"
   define void @test_scalar_or_small() {
   entry:
     ret void
Index: test/CodeGen/AArch64/GlobalISel/legalize-rem.mir
===================================================================
--- test/CodeGen/AArch64/GlobalISel/legalize-rem.mir
+++ test/CodeGen/AArch64/GlobalISel/legalize-rem.mir
@@ -2,7 +2,7 @@
 
 --- |
   target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
-  target triple = "aarch64-apple-ios"
+  target triple = "aarch64--"
   define void @test_rem() {
   entry:
     ret void
Index: test/CodeGen/AArch64/GlobalISel/legalize-simple.mir
===================================================================
--- test/CodeGen/AArch64/GlobalISel/legalize-simple.mir
+++ test/CodeGen/AArch64/GlobalISel/legalize-simple.mir
@@ -2,7 +2,7 @@
 
 --- |
   target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
-  target triple = "aarch64-apple-ios"
+  target triple = "aarch64--"
   define void @test_simple() {
   entry:
     ret void
Index: test/CodeGen/AArch64/GlobalISel/legalize-sub.mir
===================================================================
--- test/CodeGen/AArch64/GlobalISel/legalize-sub.mir
+++ test/CodeGen/AArch64/GlobalISel/legalize-sub.mir
@@ -2,7 +2,7 @@
 
 --- |
   target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
-  target triple = "aarch64-apple-ios"
+  target triple = "aarch64--"
   define void @test_scalar_sub_small() {
   entry:
     ret void
Index: test/CodeGen/AArch64/GlobalISel/legalize-xor.mir
===================================================================
--- test/CodeGen/AArch64/GlobalISel/legalize-xor.mir
+++ test/CodeGen/AArch64/GlobalISel/legalize-xor.mir
@@ -2,7 +2,7 @@
 
 --- |
   target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
-  target triple = "aarch64-apple-ios"
+  target triple = "aarch64--"
   define void @test_scalar_xor_small() {
   entry:
     ret void
Index: unittests/CodeGen/GlobalISel/CMakeLists.txt
===================================================================
--- unittests/CodeGen/GlobalISel/CMakeLists.txt
+++ unittests/CodeGen/GlobalISel/CMakeLists.txt
@@ -1,5 +1,6 @@
 set(LLVM_LINK_COMPONENTS
   GlobalISel
+  CodeGen
   )
 
 if(LLVM_BUILD_GLOBAL_ISEL)