Index: lib/Target/AMDGPU/SIInstrInfo.cpp
===================================================================
--- lib/Target/AMDGPU/SIInstrInfo.cpp
+++ lib/Target/AMDGPU/SIInstrInfo.cpp
@@ -3464,6 +3464,7 @@
     return 4;
 
   switch (Opc) {
+  case AMDGPU::SI_MASK_BRANCH:
   case TargetOpcode::IMPLICIT_DEF:
   case TargetOpcode::KILL:
   case TargetOpcode::DBG_VALUE:
Index: lib/Target/AMDGPU/SIInstructions.td
===================================================================
--- lib/Target/AMDGPU/SIInstructions.td
+++ lib/Target/AMDGPU/SIInstructions.td
@@ -143,7 +143,6 @@
   let isBranch = 0;
   let isTerminator = 1;
   let isBarrier = 0;
-  let SALU = 1;
   let Uses = [EXEC];
   let SchedRW = [];
   let hasNoSchedulingInfo = 1;