Index: lib/Target/X86/X86InstrShiftRotate.td =================================================================== --- lib/Target/X86/X86InstrShiftRotate.td +++ lib/Target/X86/X86InstrShiftRotate.td @@ -609,19 +609,19 @@ // Rotate by 1 def ROR8r1 : I<0xD0, MRM1r, (outs GR8 :$dst), (ins GR8 :$src1), "ror{b}\t$dst", - [(set GR8:$dst, (rotr GR8:$src1, (i8 1)))], + [(set GR8:$dst, (rotl GR8:$src1, (i8 7)))], IIC_SR>; def ROR16r1 : I<0xD1, MRM1r, (outs GR16:$dst), (ins GR16:$src1), "ror{w}\t$dst", - [(set GR16:$dst, (rotr GR16:$src1, (i8 1)))], + [(set GR16:$dst, (rotl GR16:$src1, (i8 15)))], IIC_SR>, OpSize16; def ROR32r1 : I<0xD1, MRM1r, (outs GR32:$dst), (ins GR32:$src1), "ror{l}\t$dst", - [(set GR32:$dst, (rotr GR32:$src1, (i8 1)))], + [(set GR32:$dst, (rotl GR32:$src1, (i8 31)))], IIC_SR>, OpSize32; def ROR64r1 : RI<0xD1, MRM1r, (outs GR64:$dst), (ins GR64:$src1), "ror{q}\t$dst", - [(set GR64:$dst, (rotr GR64:$src1, (i8 1)))], + [(set GR64:$dst, (rotl GR64:$src1, (i8 63)))], IIC_SR>; } // Constraints = "$src = $dst", SchedRW Index: test/CodeGen/X86/rotate.ll =================================================================== --- test/CodeGen/X86/rotate.ll +++ test/CodeGen/X86/rotate.ll @@ -73,7 +73,7 @@ ; CHECK-LABEL: rotr1_32: ; CHECK: # BB#0: ; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax -; CHECK-NEXT: roll $31, %eax +; CHECK-NEXT: rorl %eax ; CHECK-NEXT: retl %B = shl i32 %A, 31 ; [#uses=1] %C = lshr i32 %A, 1 ; [#uses=1] @@ -153,7 +153,7 @@ ; CHECK-LABEL: rotr1_16: ; CHECK: # BB#0: ; CHECK-NEXT: movzwl {{[0-9]+}}(%esp), %eax -; CHECK-NEXT: rolw $15, %ax +; CHECK-NEXT: rorw %ax ; CHECK-NEXT: retl %B = lshr i16 %A, 1 ; [#uses=1] %C = shl i16 %A, 15 ; [#uses=1] @@ -229,7 +229,7 @@ ; CHECK-LABEL: rotr1_8: ; CHECK: # BB#0: ; CHECK-NEXT: movb {{[0-9]+}}(%esp), %al -; CHECK-NEXT: rolb $7, %al +; CHECK-NEXT: rorb %al ; CHECK-NEXT: retl %B = lshr i8 %A, 1 ; [#uses=1] %C = shl i8 %A, 7 ; [#uses=1]