Index: clang/lib/CodeGen/CGCall.cpp =================================================================== --- clang/lib/CodeGen/CGCall.cpp +++ clang/lib/CodeGen/CGCall.cpp @@ -1805,6 +1805,9 @@ // them). LLVM will remove this attribute where it safely can. FuncAttrs.addAttribute(llvm::Attribute::Convergent); + // Exceptions aren't supported in CUDA device code. + FuncAttrs.addAttribute(llvm::Attribute::NoUnwind); + // Respect -fcuda-flush-denormals-to-zero. if (getLangOpts().CUDADeviceFlushDenormalsToZero) FuncAttrs.addAttribute("nvptx-f32ftz", "true"); Index: clang/lib/CodeGen/CGException.cpp =================================================================== --- clang/lib/CodeGen/CGException.cpp +++ clang/lib/CodeGen/CGException.cpp @@ -698,6 +698,10 @@ return nullptr; } + // CUDA device code doesn't have exceptions. + if (LO.CUDA && LO.CUDAIsDevice) + return nullptr; + // Check the innermost scope for a cached landing pad. If this is // a non-EH cleanup, we'll check enclosing scopes in EmitLandingPad. llvm::BasicBlock *LP = EHStack.begin()->getCachedLandingPad(); Index: clang/test/CodeGenCUDA/convergent.cu =================================================================== --- clang/test/CodeGenCUDA/convergent.cu +++ clang/test/CodeGenCUDA/convergent.cu @@ -36,8 +36,8 @@ // DEVICE: attributes [[BAZ_ATTR]] = { // DEVICE-SAME: convergent // DEVICE-SAME: } -// DEVICE: attributes [[CALL_ATTR]] = { convergent } -// DEVICE: attributes [[ASM_ATTR]] = { convergent +// DEVICE-DAG: attributes [[CALL_ATTR]] = { convergent +// DEVICE-DAG: attributes [[ASM_ATTR]] = { convergent // HOST: declare void @_Z3bazv() [[BAZ_ATTR:#[0-9]+]] // HOST: attributes [[BAZ_ATTR]] = { Index: clang/test/CodeGenCUDA/device-var-init.cu =================================================================== --- clang/test/CodeGenCUDA/device-var-init.cu +++ clang/test/CodeGenCUDA/device-var-init.cu @@ -182,9 +182,9 @@ df(); // CHECK: call void @_Z2dfv() // Verify that we only call non-empty destructors - // CHECK-NEXT: call void @_ZN8T_FA_NEDD1Ev(%struct.T_FA_NED* %t_fa_ned) #6 - // CHECK-NEXT: call void @_ZN7T_F_NEDD1Ev(%struct.T_F_NED* %t_f_ned) #6 - // CHECK-NEXT: call void @_ZN7T_B_NEDD1Ev(%struct.T_B_NED* %t_b_ned) #6 + // CHECK-NEXT: call void @_ZN8T_FA_NEDD1Ev(%struct.T_FA_NED* %t_fa_ned) + // CHECK-NEXT: call void @_ZN7T_F_NEDD1Ev(%struct.T_F_NED* %t_f_ned) + // CHECK-NEXT: call void @_ZN7T_B_NEDD1Ev(%struct.T_B_NED* %t_b_ned) // CHECK-NEXT: call void @_ZN2VDD1Ev(%struct.VD* %vd) // CHECK-NEXT: call void @_ZN3NEDD1Ev(%struct.NED* %ned) // CHECK-NEXT: call void @_ZN2UDD1Ev(%struct.UD* %ud) Index: clang/test/CodeGenCUDA/nothrow.cu =================================================================== --- /dev/null +++ clang/test/CodeGenCUDA/nothrow.cu @@ -0,0 +1,39 @@ +// RUN: %clang_cc1 -std=c++11 -fcxx-exceptions -fexceptions -fcuda-is-device \ +// RUN: -triple nvptx-nvidia-cuda -emit-llvm -disable-llvm-passes -o - %s | \ +// RUN FileCheck -check-prefix DEVICE %s + +// RUN: %clang_cc1 -std=c++11 -fcxx-exceptions -fexceptions \ +// RUN: -triple x86_64-unknown-linux-gnu -emit-llvm -disable-llvm-passes -o - %s | \ +// RUN: FileCheck -check-prefix HOST %s + +#include "Inputs/cuda.h" + +__host__ __device__ void f(); + +// HOST: define void @_Z7host_fnv() [[HOST_ATTR:#[0-9]+]] +void host_fn() { f(); } + +// DEVICE: define void @_Z3foov() [[DEVICE_ATTR:#[0-9]+]] +__device__ void foo() { + // DEVICE: call void @_Z1fv + f(); +} + +// DEVICE: define void @_Z12foo_noexceptv() [[DEVICE_ATTR:#[0-9]+]] +__device__ void foo_noexcept() noexcept { + // DEVICE: call void @_Z1fv + f(); +} + +// This is nounwind only on the device side. +// CHECK: define void @_Z3foov() [[DEVICE_ATTR:#[0-9]+]] +__host__ __device__ void bar() { f(); } + +// DEVICE: define void @_Z3bazv() [[DEVICE_ATTR:#[0-9]+]] +__global__ void baz() { f(); } + +// DEVICE: attributes [[DEVICE_ATTR]] = { +// DEVICE-SAME: nounwind +// HOST: attributes [[HOST_ATTR]] = { +// HOST-NOT: nounwind +// HOST-SAME: }