Index: lib/Sema/SemaChecking.cpp =================================================================== --- lib/Sema/SemaChecking.cpp +++ lib/Sema/SemaChecking.cpp @@ -1455,6 +1455,13 @@ return SemaBuiltinConstantArgRange(TheCall, i, l, u + l); } +// CheckMipsBuiltinFunctionCall - Checks the constant value passed to the +// intrinsic is correct. The switch statement is ordered by DSP, MSA. The +// ordering for DSP is unspecified. MSA is ordered by the data format used +// by the underlying instruction i.e., df/m, df/n and then by size. +// +// FIXME: The size tests here should instead be tablegen'd along with the +// definitions from include/clang/Basic/BuiltinsMips.def. bool Sema::CheckMipsBuiltinFunctionCall(unsigned BuiltinID, CallExpr *TheCall) { unsigned i = 0, l = 0, u = 0; switch (BuiltinID) { @@ -1466,6 +1473,161 @@ case Mips::BI__builtin_mips_precr_sra_ph_w: i = 2; l = 0; u = 31; break; case Mips::BI__builtin_mips_precr_sra_r_ph_w: i = 2; l = 0; u = 31; break; case Mips::BI__builtin_mips_prepend: i = 2; l = 0; u = 31; break; + // MSA instrinsics. Instructions (which the intrinsics maps to) which use the + // df/m field. + // These intrinsics take an unsigned 3 bit immediate. + case Mips::BI__builtin_msa_bclri_b: + case Mips::BI__builtin_msa_bnegi_b: + case Mips::BI__builtin_msa_bseti_b: + case Mips::BI__builtin_msa_sat_s_b: + case Mips::BI__builtin_msa_sat_u_b: + case Mips::BI__builtin_msa_slli_b: + case Mips::BI__builtin_msa_srai_b: + case Mips::BI__builtin_msa_srari_b: + case Mips::BI__builtin_msa_srli_b: + case Mips::BI__builtin_msa_srlri_b: i = 1; l = 0; u = 7; break; + case Mips::BI__builtin_msa_binsli_b: + case Mips::BI__builtin_msa_binsri_b: i = 2; l = 0; u = 7; break; + // These intrinsics take an unsigned 4 bit immediate. + case Mips::BI__builtin_msa_bclri_h: + case Mips::BI__builtin_msa_bnegi_h: + case Mips::BI__builtin_msa_bseti_h: + case Mips::BI__builtin_msa_sat_s_h: + case Mips::BI__builtin_msa_sat_u_h: + case Mips::BI__builtin_msa_slli_h: + case Mips::BI__builtin_msa_srai_h: + case Mips::BI__builtin_msa_srari_h: + case Mips::BI__builtin_msa_srli_h: + case Mips::BI__builtin_msa_srlri_h: i = 1; l = 0; u = 15; break; + case Mips::BI__builtin_msa_binsli_h: + case Mips::BI__builtin_msa_binsri_h: i = 2; l = 0; u = 15; break; + // These intrinsics take an unsigned 5 bit immedate. + // The first block of intrinsics actually have an unsigned 5 bit field, + // not a df/n field. + case Mips::BI__builtin_msa_clei_u_b: + case Mips::BI__builtin_msa_clei_u_h: + case Mips::BI__builtin_msa_clei_u_w: + case Mips::BI__builtin_msa_clei_u_d: + case Mips::BI__builtin_msa_clti_u_b: + case Mips::BI__builtin_msa_clti_u_h: + case Mips::BI__builtin_msa_clti_u_w: + case Mips::BI__builtin_msa_clti_u_d: + case Mips::BI__builtin_msa_maxi_u_b: + case Mips::BI__builtin_msa_maxi_u_h: + case Mips::BI__builtin_msa_maxi_u_w: + case Mips::BI__builtin_msa_maxi_u_d: + case Mips::BI__builtin_msa_mini_u_b: + case Mips::BI__builtin_msa_mini_u_h: + case Mips::BI__builtin_msa_mini_u_w: + case Mips::BI__builtin_msa_mini_u_d: + case Mips::BI__builtin_msa_addvi_b: + case Mips::BI__builtin_msa_addvi_h: + case Mips::BI__builtin_msa_addvi_w: + case Mips::BI__builtin_msa_addvi_d: + case Mips::BI__builtin_msa_bclri_w: + case Mips::BI__builtin_msa_bnegi_w: + case Mips::BI__builtin_msa_bseti_w: + case Mips::BI__builtin_msa_sat_s_w: + case Mips::BI__builtin_msa_sat_u_w: + case Mips::BI__builtin_msa_slli_w: + case Mips::BI__builtin_msa_srai_w: + case Mips::BI__builtin_msa_srari_w: + case Mips::BI__builtin_msa_srli_w: + case Mips::BI__builtin_msa_srlri_w: + case Mips::BI__builtin_msa_subvi_b: + case Mips::BI__builtin_msa_subvi_h: + case Mips::BI__builtin_msa_subvi_w: + case Mips::BI__builtin_msa_subvi_d: i = 1; l = 0; u = 31; break; + case Mips::BI__builtin_msa_binsli_w: + case Mips::BI__builtin_msa_binsri_w: i = 2; l = 0; u = 31; break; + // These intrinsics take an unsigned 6 bit immediate. + case Mips::BI__builtin_msa_bclri_d: + case Mips::BI__builtin_msa_bnegi_d: + case Mips::BI__builtin_msa_bseti_d: + case Mips::BI__builtin_msa_sat_s_d: + case Mips::BI__builtin_msa_sat_u_d: + case Mips::BI__builtin_msa_slli_d: + case Mips::BI__builtin_msa_srai_d: + case Mips::BI__builtin_msa_srari_d: + case Mips::BI__builtin_msa_srli_d: + case Mips::BI__builtin_msa_srlri_d: i = 1; l = 0; u = 63; break; + case Mips::BI__builtin_msa_binsli_d: + case Mips::BI__builtin_msa_binsri_d: i = 2; l = 0; u = 63; break; + // These intrinsics take a signed 5 bit immediate. + case Mips::BI__builtin_msa_ceqi_b: + case Mips::BI__builtin_msa_ceqi_h: + case Mips::BI__builtin_msa_ceqi_w: + case Mips::BI__builtin_msa_ceqi_d: + case Mips::BI__builtin_msa_clti_s_b: + case Mips::BI__builtin_msa_clti_s_h: + case Mips::BI__builtin_msa_clti_s_w: + case Mips::BI__builtin_msa_clti_s_d: + case Mips::BI__builtin_msa_clei_s_b: + case Mips::BI__builtin_msa_clei_s_h: + case Mips::BI__builtin_msa_clei_s_w: + case Mips::BI__builtin_msa_clei_s_d: + case Mips::BI__builtin_msa_maxi_s_b: + case Mips::BI__builtin_msa_maxi_s_h: + case Mips::BI__builtin_msa_maxi_s_w: + case Mips::BI__builtin_msa_maxi_s_d: + case Mips::BI__builtin_msa_mini_s_b: + case Mips::BI__builtin_msa_mini_s_h: + case Mips::BI__builtin_msa_mini_s_w: + case Mips::BI__builtin_msa_mini_s_d: i = 1; l = -16; u = 15; break; + // These intrinsics take an unsigned 8 bit immediate. + case Mips::BI__builtin_msa_andi_b: + case Mips::BI__builtin_msa_nori_b: + case Mips::BI__builtin_msa_ori_b: + case Mips::BI__builtin_msa_shf_b: + case Mips::BI__builtin_msa_shf_h: + case Mips::BI__builtin_msa_shf_w: + case Mips::BI__builtin_msa_xori_b: i = 1; l = 0; u = 255; break; + case Mips::BI__builtin_msa_bseli_b: + case Mips::BI__builtin_msa_bmnzi_b: + case Mips::BI__builtin_msa_bmzi_b: i = 2; l = 0; u = 255; break; + // df/n format + // These intrinsics take an unsigned 4 bit immediate. + case Mips::BI__builtin_msa_copy_s_b: + case Mips::BI__builtin_msa_copy_u_b: + case Mips::BI__builtin_msa_insve_b: + case Mips::BI__builtin_msa_splati_b: i = 1; l = 0; u = 15; break; + case Mips::BI__builtin_msa_sld_b: + case Mips::BI__builtin_msa_sldi_b: i = 2; l = 0; u = 15; break; + // These intrinsics take an unsigned 3 bit immediate. + case Mips::BI__builtin_msa_copy_s_h: + case Mips::BI__builtin_msa_copy_u_h: + case Mips::BI__builtin_msa_insve_h: + case Mips::BI__builtin_msa_splati_h: i = 1; l = 0; u = 7; break; + case Mips::BI__builtin_msa_sld_h: + case Mips::BI__builtin_msa_sldi_h: i = 2; l = 0; u = 7; break; + // These intrinsics take an unsigned 2 bit immediate. + case Mips::BI__builtin_msa_copy_s_w: + case Mips::BI__builtin_msa_copy_u_w: + case Mips::BI__builtin_msa_insve_w: + case Mips::BI__builtin_msa_splati_w: i = 1; l = 0; u = 3; break; + case Mips::BI__builtin_msa_sld_w: + case Mips::BI__builtin_msa_sldi_w: i = 2; l = 0; u = 3; break; + // These intrinsics take an unsigned 1 bit immediate. + case Mips::BI__builtin_msa_copy_s_d: + case Mips::BI__builtin_msa_copy_u_d: + case Mips::BI__builtin_msa_insve_d: + case Mips::BI__builtin_msa_splati_d: i = 1; l = 0; u = 1; break; + case Mips::BI__builtin_msa_sld_d: + case Mips::BI__builtin_msa_sldi_d: i = 2; l = 0; u = 1; break; + // Memory offsets and immediate loads. + // These intrinsics take a signed 10 bit immediate. + case Mips::BI__builtin_msa_ldi_b: i = 0; l = -128; u = 127; break; + case Mips::BI__builtin_msa_ldi_h: + case Mips::BI__builtin_msa_ldi_w: + case Mips::BI__builtin_msa_ldi_d: i = 0; l = -512; u = 511; break; + case Mips::BI__builtin_msa_ld_b: + case Mips::BI__builtin_msa_ld_h: + case Mips::BI__builtin_msa_ld_w: + case Mips::BI__builtin_msa_ld_d: i = 1; l = -512; u = 511; break; + case Mips::BI__builtin_msa_st_b: + case Mips::BI__builtin_msa_st_h: + case Mips::BI__builtin_msa_st_w: + case Mips::BI__builtin_msa_st_d: i = 2; l = -512; u = 511; break; } return SemaBuiltinConstantArgRange(TheCall, i, l, u); Index: test/CodeGen/builtins-mips-msa-error.c =================================================================== --- /dev/null +++ test/CodeGen/builtins-mips-msa-error.c @@ -0,0 +1,431 @@ +// REQUIRES: mips-registered-target +// RUN: not %clang_cc1 -triple mips-unknown-linux-gnu -fsyntax-only %s \ +// RUN: -target-feature +msa -target-feature +fp64 \ +// RUN: -mfloat-abi hard -o - 2>&1 | FileCheck %s + +#include + +typedef __fp16 v8f16 __attribute__ ((vector_size(16))); + +void test(void) { + v16i8 v16i8_a = (v16i8) {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15}; + v16i8 v16i8_b = (v16i8) {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16}; + v16i8 v16i8_r; + v8i16 v8i16_a = (v8i16) {0, 1, 2, 3, 4, 5, 6, 7}; + v8i16 v8i16_b = (v8i16) {1, 2, 3, 4, 5, 6, 7, 8}; + v8i16 v8i16_r; + v4i32 v4i32_a = (v4i32) {0, 1, 2, 3}; + v4i32 v4i32_b = (v4i32) {1, 2, 3, 4}; + v4i32 v4i32_r; + v2i64 v2i64_a = (v2i64) {0, 1}; + v2i64 v2i64_b = (v2i64) {1, 2}; + v2i64 v2i64_r; + + v16u8 v16u8_a = (v16u8) {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15}; + v16u8 v16u8_b = (v16u8) {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16}; + v16u8 v16u8_r; + v8u16 v8u16_a = (v8u16) {0, 1, 2, 3, 4, 5, 6, 7}; + v8u16 v8u16_b = (v8u16) {1, 2, 3, 4, 5, 6, 7, 8}; + v8u16 v8u16_r; + v4u32 v4u32_a = (v4u32) {0, 1, 2, 3}; + v4u32 v4u32_b = (v4u32) {1, 2, 3, 4}; + v4u32 v4u32_r; + v2u64 v2u64_a = (v2u64) {0, 1}; + v2u64 v2u64_b = (v2u64) {1, 2}; + v2u64 v2u64_r; + + v8f16 v8f16_a = (v8f16) {0.5, 1, 2, 3, 4, 5, 6, 7}; + v8f16 v8f16_b = (v8f16) {1.5, 2, 3, 4, 5, 6, 7, 8}; + v8f16 v8f16_r; + v4f32 v4f32_a = (v4f32) {0.5, 1, 2, 3}; + v4f32 v4f32_b = (v4f32) {1.5, 2, 3, 4}; + v4f32 v4f32_r; + v2f64 v2f64_a = (v2f64) {0.5, 1}; + v2f64 v2f64_b = (v2f64) {1.5, 2}; + v2f64 v2f64_r; + + int int_r; + long long ll_r; + int int_a = 0; + + v16u8_r = __msa_addvi_b(v16u8_a, 32); // expected-error {{argument should be a value from 0 to 31}} + v8u16_r = __msa_addvi_h(v8u16_a, 32); // expected-error {{argument should be a value from 0 to 31}} + v4u32_r = __msa_addvi_w(v4u32_a, 32); // expected-error {{argument should be a value from 0 to 31}} + v2u64_r = __msa_addvi_d(v2u64_a, 32); // expected-error {{argument should be a value from 0 to 31}} + + v16i8_r = __msa_andi_b(v16i8_a, 256); // CHECK: warning: argument should be a value from 0 to 255}} + v8i16_r = __msa_andi_b(v8i16_a, 256); // CHECK: warning: argument should be a value from 0 to 255}} + v4i32_r = __msa_andi_b(v4i32_a, 256); // CHECK: warning: argument should be a value from 0 to 255}} + v2i64_r = __msa_andi_b(v2i64_a, 256); // CHECK: warning: argument should be a value from 0 to 255}} + + v16i8_r = __msa_bclri_b(v16i8_a, 8); // expected-error {{argument should be a value from 0 to 7}} + v8i16_r = __msa_bclri_h(v8i16_a, 16); // expected-error {{argument should be a value from 0 to 15}} + v4i32_r = __msa_bclri_w(v4i32_a, 33); // expected-error {{argument should be a value from 0 to 31}} + v2i64_r = __msa_bclri_d(v2i64_a, 64); // expected-error {{argument should be a value from 0 to 63}} + + v16i8_r = __msa_binsli_b(v16i8_r, v16i8_a, 8); // expected-error {{argument should be a value from 0 to 7}} + v8i16_r = __msa_binsli_h(v8i16_r, v8i16_a, 16); // expected-error {{argument should be a value from 0 to 15}} + v4i32_r = __msa_binsli_w(v4i32_r, v4i32_a, 32); // expected-error {{argument should be a value from 0 to 31}} + v2i64_r = __msa_binsli_d(v2i64_r, v2i64_a, 64); // expected-error {{argument should be a value from 0 to 63}} + + v16i8_r = __msa_binsri_b(v16i8_r, v16i8_a, 8); // expected-error {{argument should be a value from 0 to 7}} + v8i16_r = __msa_binsri_h(v8i16_r, v8i16_a, 16); // expected-error {{argument should be a value from 0 to 15}} + v4i32_r = __msa_binsri_w(v4i32_r, v4i32_a, 32); // expected-error {{argument should be a value from 0 to 31}} + v2i64_r = __msa_binsri_d(v2i64_r, v2i64_a, 64); // expected-error {{argument should be a value from 0 to 63}} + + v16i8_r = __msa_bmnzi_b(v16i8_r, v16i8_a, 256); // expected-error {{argument should be a value from 0 to 255}} + + v16i8_r = __msa_bmzi_b(v16i8_r, v16i8_a, 256); // expected-error {{argument should be a value from 0 to 255}} + + v16i8_r = __msa_bnegi_b(v16i8_a, 8); // expected-error {{argument should be a value from 0 to 7}} + v8i16_r = __msa_bnegi_h(v8i16_a, 16); // expected-error {{argument should be a value from 0 to 15}} + v4i32_r = __msa_bnegi_w(v4i32_a, 32); // expected-error {{argument should be a value from 0 to 31}} + v2i64_r = __msa_bnegi_d(v2i64_a, 64); // expected-error {{argument should be a value from 0 to 63}} + + v16i8_r = __msa_bseli_b(v16i8_r, v16i8_a, 256); // expected-error {{argument should be a value from 0 to 255}} + + v16i8_r = __msa_bseti_b(v16i8_a, 8); // expected-error {{argument should be a value from 0 to 7}} + v8i16_r = __msa_bseti_h(v8i16_a, 16); // expected-error {{argument should be a value from 0 to 15}} + v4i32_r = __msa_bseti_w(v4i32_a, 32); // expected-error {{argument should be a value from 0 to 31}} + v2i64_r = __msa_bseti_d(v2i64_a, 64); // expected-error {{argument should be a value from 0 to 63}} + + v16i8_r = __msa_ceqi_b(v16i8_a, 16); // expected-error {{argument should be a value from -16 to 15}} + v8i16_r = __msa_ceqi_h(v8i16_a, 16); // expected-error {{argument should be a value from -16 to 15}} + v4i32_r = __msa_ceqi_w(v4i32_a, 16); // expected-error {{argument should be a value from -16 to 15}} + v2i64_r = __msa_ceqi_d(v2i64_a, 16); // expected-error {{argument should be a value from -16 to 15}} + + v16i8_r = __msa_clei_s_b(v16i8_a, 16); // expected-error {{argument should be a value from -16 to 15}} + v8i16_r = __msa_clei_s_h(v8i16_a, 16); // expected-error {{argument should be a value from -16 to 15}} + v4i32_r = __msa_clei_s_w(v4i32_a, 16); // expected-error {{argument should be a value from -16 to 15}} + v2i64_r = __msa_clei_s_d(v2i64_a, 16); // expected-error {{argument should be a value from -16 to 15}} + + v16u8_r = __msa_clei_u_b(v16u8_a, 32); // expected-error {{argument should be a value from 0 to 31}} + v8u16_r = __msa_clei_u_h(v8u16_a, 32); // expected-error {{argument should be a value from 0 to 31}} + v4u32_r = __msa_clei_u_w(v4u32_a, 32); // expected-error {{argument should be a value from 0 to 31}} + v2u64_r = __msa_clei_u_d(v2u64_a, 32); // expected-error {{argument should be a value from 0 to 31}} + + v16i8_r = __msa_clti_s_b(v16i8_a, 16); // expected-error {{argument should be a value from -16 to 15}} + v8i16_r = __msa_clti_s_h(v8i16_a, 16); // expected-error {{argument should be a value from -16 to 15}} + v4i32_r = __msa_clti_s_w(v4i32_a, 16); // expected-error {{argument should be a value from -16 to 15}} + v2i64_r = __msa_clti_s_d(v2i64_a, 16); // expected-error {{argument should be a value from -16 to 15}} + + v16u8_r = __msa_clti_u_b(v16u8_a, 32); // expected-error {{argument should be a value from 0 to 31}} + v8u16_r = __msa_clti_u_h(v8u16_a, 32); // expected-error {{argument should be a value from 0 to 31}} + v4u32_r = __msa_clti_u_w(v4u32_a, 32); // expected-error {{argument should be a value from 0 to 31}} + v2u64_r = __msa_clti_u_d(v2u64_a, 32); // expected-error {{argument should be a value from 0 to 31}} + + int_r = __msa_copy_s_b(v16i8_a, 16); // expected-error {{argument should be a value from 0 to 15}} + int_r = __msa_copy_s_h(v8i16_a, 8); // expected-error {{argument should be a value from 0 to 7}} + int_r = __msa_copy_s_w(v4i32_a, 3); // expected-error {{argument should be a value from 0 to 3}} + ll_r = __msa_copy_s_d(v2i64_a, 2); // expected-error {{argument should be a value from 0 to 1}} + + int_r = __msa_copy_u_b(v16u8_a, 16); // expected-error {{argument should be a value from 0 to 15}} + int_r = __msa_copy_u_h(v8u16_a, 8); // expected-error {{argument should be a value from 0 to 7}} + int_r = __msa_copy_u_w(v4u32_a, 4); // expected-error {{argument should be a value from 0 to 3}} + ll_r = __msa_copy_u_d(v2i64_a, 2); // expected-error {{argument should be a value from 0 to 1}} + + v16i8_r = __msa_insve_b(v16i8_r, 16, v16i8_a); // expected-error {{argument should be a value from 0 to 15}} + v8i16_r = __msa_insve_h(v8i16_r, 8, v8i16_a); // expected-error {{argument should be a value from 0 to 7}} + v4i32_r = __msa_insve_w(v4i32_r, 4, v4i32_a); // expected-error {{argument should be a value from 0 to 3}} + v2i64_r = __msa_insve_d(v2i64_r, 2, v2i64_a); // expected-error {{argument should be a value from 0 to 1}} + + v16i8_r = __msa_ld_b(&v16i8_a, 512); // expected-error {{argument should be a value from -512 to 511}} + v8i16_r = __msa_ld_h(&v8i16_a, 512); // expected-error {{argument should be a value from -512 to 511}} + v4i32_r = __msa_ld_w(&v4i32_a, 512); // expected-error {{argument should be a value from -512 to 511}} + v2i64_r = __msa_ld_d(&v2i64_a, 512); // expected-error {{argument should be a value from -512 to 511}} + + v16i8_r = __msa_ldi_b(512); // expected-error {{argument should be a value from -512 to 511}} + v8i16_r = __msa_ldi_h(512); // expected-error {{argument should be a value from -512 to 511}} + v4i32_r = __msa_ldi_w(512); // expected-error {{argument should be a value from -512 to 511}} + v2i64_r = __msa_ldi_d(512); // expected-error {{argument should be a value from -512 to 511}} + + v16i8_r = __msa_maxi_s_b(v16i8_a, 16); // expected-error {{argument should be a value from -16 to 15}} + v8i16_r = __msa_maxi_s_h(v8i16_a, 16); // expected-error {{argument should be a value from -16 to 15}} + v4i32_r = __msa_maxi_s_w(v4i32_a, 16); // expected-error {{argument should be a value from -16 to 15}} + v2i64_r = __msa_maxi_s_d(v2i64_a, 16); // expected-error {{argument should be a value from -16 to 15}} + + v16u8_r = __msa_maxi_u_b(v16u8_a, 32); // expected-error {{argument should be a value from 0 to 31}} + v8u16_r = __msa_maxi_u_h(v8u16_a, 32); // expected-error {{argument should be a value from 0 to 31}} + v4u32_r = __msa_maxi_u_w(v4u32_a, 32); // expected-error {{argument should be a value from 0 to 31}} + v2u64_r = __msa_maxi_u_d(v2u64_a, 32); // expected-error {{argument should be a value from 0 to 31}} + + v16i8_r = __msa_mini_s_b(v16i8_a, 16); // expected-error {{argument should be a value from -16 to 15}} + v8i16_r = __msa_mini_s_h(v8i16_a, 16); // expected-error {{argument should be a value from -16 to 15}} + v4i32_r = __msa_mini_s_w(v4i32_a, 16); // expected-error {{argument should be a value from -16 to 15}} + v2i64_r = __msa_mini_s_d(v2i64_a, 16); // expected-error {{argument should be a value from -16 to 15}} + + v16u8_r = __msa_mini_u_b(v16u8_a, 32); // expected-error {{argument should be a value from 0 to 31}} + v8u16_r = __msa_mini_u_h(v8u16_a, 32); // expected-error {{argument should be a value from 0 to 31}} + v4u32_r = __msa_mini_u_w(v4u32_a, 32); // expected-error {{argument should be a value from 0 to 31}} + v2u64_r = __msa_mini_u_d(v2u64_a, 32); // expected-error {{argument should be a value from 0 to 31}} + + v16i8_r = __msa_nori_b(v16i8_a, 256); // CHECK: warning: argument should be a value from 0 to 255}} + + v16i8_r = __msa_ori_b(v16i8_a, 256); // CHECK: warning: argument should be a value from 0 to 255}} + + v16i8_r = __msa_sat_s_b(v16i8_a, 8); // expected-error {{argument should be a value from 0 to 7}} + v8i16_r = __msa_sat_s_h(v8i16_a, 16); // expected-error {{argument should be a value from 0 to 15}} + v4i32_r = __msa_sat_s_w(v4i32_a, 32); // expected-error {{argument should be a value from 0 to 31}} + v2i64_r = __msa_sat_s_d(v2i64_a, 64); // expected-error {{argument should be a value from 0 to 63}} + + v16i8_r = __msa_sat_u_b(v16i8_a, 8); // expected-error {{argument should be a value from 0 to 7}} + v8i16_r = __msa_sat_u_h(v8i16_a, 16); // expected-error {{argument should be a value from 0 to 15}} + v4i32_r = __msa_sat_u_w(v4i32_a, 32); // expected-error {{argument should be a value from 0 to 31}} + v2i64_r = __msa_sat_u_d(v2i64_a, 64); // expected-error {{argument should be a value from 0 to 63}} + + v16i8_r = __msa_shf_b(v16i8_a, 256); // CHECK: warning: argument should be a value from 0 to 255}} + v8i16_r = __msa_shf_h(v8i16_a, 256); // CHECK: warning: argument should be a value from 0 to 255}} + v4i32_r = __msa_shf_w(v4i32_a, 256); // CHECK: warning: argument should be a value from 0 to 255}} + + v16i8_r = __msa_sld_b(v16i8_r, v16i8_a, 16); // expected-error {{argument should be a value from 0 to 15}} + v8i16_r = __msa_sld_h(v8i16_r, v8i16_a, 8); // expected-error {{argument should be a value from 0 to 7}} + v4i32_r = __msa_sld_w(v4i32_r, v4i32_a, 4); // expected-error {{argument should be a value from 0 to 3}} + v2i64_r = __msa_sld_d(v2i64_r, v2i64_a, 2); // expected-error {{argument should be a value from 0 to 1}} + + v16i8_r = __msa_sldi_b(v16i8_r, v16i8_a, 16); // expected-error {{argument should be a value from 0 to 15}} + v8i16_r = __msa_sldi_h(v8i16_r, v8i16_a, 8); // expected-error {{argument should be a value from 0 to 7}} + v4i32_r = __msa_sldi_w(v4i32_r, v4i32_a, 4); // expected-error {{argument should be a value from 0 to 3}} + v2i64_r = __msa_sldi_d(v2i64_r, v2i64_a, 2); // expected-error {{argument should be a value from 0 to 1}} + + v16i8_r = __msa_slli_b(v16i8_a, 8); // expected-error {{argument should be a value from 0 to 7}} + v8i16_r = __msa_slli_h(v8i16_a, 16); // expected-error {{argument should be a value from 0 to 15}} + v4i32_r = __msa_slli_w(v4i32_a, 32); // expected-error {{argument should be a value from 0 to 31}} + v2i64_r = __msa_slli_d(v2i64_a, 64); // expected-error {{argument should be a value from 0 to 63}} + + v16i8_r = __msa_splati_b(v16i8_a, 16); // expected-error {{argument should be a value from 0 to 15}} + v8i16_r = __msa_splati_h(v8i16_a, 8); // expected-error {{argument should be a value from 0 to 7}} + v4i32_r = __msa_splati_w(v4i32_a, 4); // expected-error {{argument should be a value from 0 to 3}} + v2i64_r = __msa_splati_d(v2i64_a, 2); // expected-error {{argument should be a value from 0 to 1}} + + v16i8_r = __msa_srai_b(v16i8_a, 8); // expected-error {{argument should be a value from 0 to 7}} + v8i16_r = __msa_srai_h(v8i16_a, 16); // expected-error {{argument should be a value from 0 to 15}} + v4i32_r = __msa_srai_w(v4i32_a, 32); // expected-error {{argument should be a value from 0 to 31}} + v2i64_r = __msa_srai_d(v2i64_a, 64); // expected-error {{argument should be a value from 0 to 63}} + + v16i8_r = __msa_srari_b(v16i8_a, 8); // expected-error {{argument should be a value from 0 to 7}} + v8i16_r = __msa_srari_h(v8i16_a, 16); // expected-error {{argument should be a value from 0 to 15}} + v4i32_r = __msa_srari_w(v4i32_a, 32); // expected-error {{argument should be a value from 0 to 31}} + v2i64_r = __msa_srari_d(v2i64_a, 64); // expected-error {{argument should be a value from 0 to 63}} + + v16i8_r = __msa_srli_b(v16i8_a, 8); // expected-error {{argument should be a value from 0 to 7}} + v8i16_r = __msa_srli_h(v8i16_a, 16); // expected-error {{argument should be a value from 0 to 15}} + v4i32_r = __msa_srli_w(v4i32_a, 32); // expected-error {{argument should be a value from 0 to 31}} + v2i64_r = __msa_srli_d(v2i64_a, 64); // expected-error {{argument should be a value from 0 to 63}} + + v16i8_r = __msa_srlri_b(v16i8_a, 8); // expected-error {{argument should be a value from 0 to 7}} + v8i16_r = __msa_srlri_h(v8i16_a, 16); // expected-error {{argument should be a value from 0 to 15}} + v4i32_r = __msa_srlri_w(v4i32_a, 32); // expected-error {{argument should be a value from 0 to 31}} + v2i64_r = __msa_srlri_d(v2i64_a, 64); // expected-error {{argument should be a value from 0 to 63}} + + __msa_st_b(v16i8_b, &v16i8_a, 512); // expected-error {{argument should be a value from -512 to 511}} + __msa_st_h(v8i16_b, &v8i16_a, 512); // expected-error {{argument should be a value from -512 to 511}} + __msa_st_w(v4i32_b, &v4i32_a, 512); // expected-error {{argument should be a value from -512 to 511}} + __msa_st_d(v2i64_b, &v2i64_a, 512); // expected-error {{argument should be a value from -512 to 511}} + + v16i8_r = __msa_subvi_b(v16i8_a, 256); // expected-error {{argument should be a value from 0 to 31}} + v8i16_r = __msa_subvi_h(v8i16_a, 256); // expected-error {{argument should be a value from 0 to 31}} + v4i32_r = __msa_subvi_w(v4i32_a, 256); // expected-error {{argument should be a value from 0 to 31}} + v2i64_r = __msa_subvi_d(v2i64_a, 256); // expected-error {{argument should be a value from 0 to 31}} + + v16i8_r = __msa_xori_b(v16i8_a, 256); // CHECK: warning: argument should be a value from 0 to 255}} + v8i16_r = __msa_xori_b(v8i16_a, 256); // CHECK: warning: argument should be a value from 0 to 255}} + v4i32_r = __msa_xori_b(v4i32_a, 256); // CHECK: warning: argument should be a value from 0 to 255}} + v2i64_r = __msa_xori_b(v2i64_a, 256); // CHECK: warning: argument should be a value from 0 to 255}} + + v16u8_r = __msa_xori_b(v16u8_a, 256); // CHECK: warning: argument should be a value from 0 to 255}} + v8u16_r = __msa_xori_b(v8u16_a, 256); // CHECK: warning: argument should be a value from 0 to 255}} + v4u32_r = __msa_xori_b(v4u32_a, 256); // CHECK: warning: argument should be a value from 0 to 255}} + v2u64_r = __msa_xori_b(v2u64_a, 256); // CHECK: warning: argument should be a value from 0 to 255}} + + // Test the lower bounds + + v16u8_r = __msa_addvi_b(v16u8_a, -1); // expected-error {{argument should be a value from 0 to 31}} + v8u16_r = __msa_addvi_h(v8u16_a, -1); // expected-error {{argument should be a value from 0 to 31}} + v4u32_r = __msa_addvi_w(v4u32_a, -1); // expected-error {{argument should be a value from 0 to 31}} + v2u64_r = __msa_addvi_d(v2u64_a, -1); // expected-error {{argument should be a value from 0 to 31}} + + v16i8_r = __msa_andi_b(v16i8_a, -1); // CHECK: warning: argument should be a value from 0 to 255}} + v8i16_r = __msa_andi_b(v8i16_a, -1); // CHECK: warning: argument should be a value from 0 to 255}} + v4i32_r = __msa_andi_b(v4i32_a, -1); // CHECK: warning: argument should be a value from 0 to 255}} + v2i64_r = __msa_andi_b(v2i64_a, -1); // CHECK: warning: argument should be a value from 0 to 255}} + + v16i8_r = __msa_bclri_b(v16i8_a, -1); // expected-error {{argument should be a value from 0 to 7}} + v8i16_r = __msa_bclri_h(v8i16_a, -1); // expected-error {{argument should be a value from 0 to 15}} + v4i32_r = __msa_bclri_w(v4i32_a, -1); // expected-error {{argument should be a value from 0 to 31}} + v2i64_r = __msa_bclri_d(v2i64_a, -1); // expected-error {{argument should be a value from 0 to 63}} + + v16i8_r = __msa_binsli_b(v16i8_r, v16i8_a, -8); // expected-error {{argument should be a value from 0 to 7}} + v8i16_r = __msa_binsli_h(v8i16_r, v8i16_a, -1); // expected-error {{argument should be a value from 0 to 15}} + v4i32_r = __msa_binsli_w(v4i32_r, v4i32_a, -1); // expected-error {{argument should be a value from 0 to 31}} + v2i64_r = __msa_binsli_d(v2i64_r, v2i64_a, -1); // expected-error {{argument should be a value from 0 to 63}} + + v16i8_r = __msa_binsri_b(v16i8_r, v16i8_a, -1); // expected-error {{argument should be a value from 0 to 7}} + v8i16_r = __msa_binsri_h(v8i16_r, v8i16_a, -1); // expected-error {{argument should be a value from 0 to 15}} + v4i32_r = __msa_binsri_w(v4i32_r, v4i32_a, -1); // expected-error {{argument should be a value from 0 to 31}} + v2i64_r = __msa_binsri_d(v2i64_r, v2i64_a, -1); // expected-error {{argument should be a value from 0 to 63}} + + v16i8_r = __msa_bmnzi_b(v16i8_r, v16i8_a, -1); // expected-error {{argument should be a value from 0 to 255}} + + v16i8_r = __msa_bmzi_b(v16i8_r, v16i8_a, -1); // expected-error {{argument should be a value from 0 to 255}} + + v16i8_r = __msa_bnegi_b(v16i8_a, -1); // expected-error {{argument should be a value from 0 to 7}} + v8i16_r = __msa_bnegi_h(v8i16_a, -1); // expected-error {{argument should be a value from 0 to 15}} + v4i32_r = __msa_bnegi_w(v4i32_a, -1); // expected-error {{argument should be a value from 0 to 31}} + v2i64_r = __msa_bnegi_d(v2i64_a, -1); // expected-error {{argument should be a value from 0 to 63}} + + v16i8_r = __msa_bseli_b(v16i8_r, v16i8_a, -1); // expected-error {{argument should be a value from 0 to 255}} + + v16i8_r = __msa_bseti_b(v16i8_a, -8); // expected-error {{argument should be a value from 0 to 7}} + v8i16_r = __msa_bseti_h(v8i16_a, -1); // expected-error {{argument should be a value from 0 to 15}} + v4i32_r = __msa_bseti_w(v4i32_a, -1); // expected-error {{argument should be a value from 0 to 31}} + v2i64_r = __msa_bseti_d(v2i64_a, -1); // expected-error {{argument should be a value from 0 to 63}} + + v16i8_r = __msa_ceqi_b(v16i8_a, -17); // expected-error {{argument should be a value from -16 to 15}} + v8i16_r = __msa_ceqi_h(v8i16_a, -17); // expected-error {{argument should be a value from -16 to 15}} + v4i32_r = __msa_ceqi_w(v4i32_a, -17); // expected-error {{argument should be a value from -16 to 15}} + v2i64_r = __msa_ceqi_d(v2i64_a, -17); // expected-error {{argument should be a value from -16 to 15}} + + v16i8_r = __msa_clei_s_b(v16i8_a, -17); // expected-error {{argument should be a value from -16 to 15}} + v8i16_r = __msa_clei_s_h(v8i16_a, -17); // expected-error {{argument should be a value from -16 to 15}} + v4i32_r = __msa_clei_s_w(v4i32_a, -17); // expected-error {{argument should be a value from -16 to 15}} + v2i64_r = __msa_clei_s_d(v2i64_a, -17); // expected-error {{argument should be a value from -16 to 15}} + + v16u8_r = __msa_clei_u_b(v16u8_a, -1); // expected-error {{argument should be a value from 0 to 31}} + v8u16_r = __msa_clei_u_h(v8u16_a, -1); // expected-error {{argument should be a value from 0 to 31}} + v4u32_r = __msa_clei_u_w(v4u32_a, -1); // expected-error {{argument should be a value from 0 to 31}} + v2u64_r = __msa_clei_u_d(v2u64_a, -1); // expected-error {{argument should be a value from 0 to 31}} + + v16i8_r = __msa_clti_s_b(v16i8_a, -1); // expected-error {{argument should be a value from -16 to 15}} + v8i16_r = __msa_clti_s_h(v8i16_a, -1); // expected-error {{argument should be a value from -16 to 15}} + v4i32_r = __msa_clti_s_w(v4i32_a, -1); // expected-error {{argument should be a value from -16 to 15}} + v2i64_r = __msa_clti_s_d(v2i64_a, -1); // expected-error {{argument should be a value from -16 to 15}} + + v16u8_r = __msa_clti_u_b(v16u8_a, -1); // expected-error {{argument should be a value from 0 to 31}} + v8u16_r = __msa_clti_u_h(v8u16_a, -1); // expected-error {{argument should be a value from 0 to 31}} + v4u32_r = __msa_clti_u_w(v4u32_a, -1); // expected-error {{argument should be a value from 0 to 31}} + v2u64_r = __msa_clti_u_d(v2u64_a, -1); // expected-error {{argument should be a value from 0 to 31}} + + int_r = __msa_copy_s_b(v16i8_a, -1); // expected-error {{argument should be a value from 0 to 15}} + int_r = __msa_copy_s_h(v8i16_a, -1); // expected-error {{argument should be a value from 0 to 7}} + int_r = __msa_copy_s_w(v4i32_a, -1); // expected-error {{argument should be a value from 0 to 3}} + ll_r = __msa_copy_s_d(v2i64_a, -1); // expected-error {{argument should be a value from 0 to 1}} + + int_r = __msa_copy_u_b(v16u8_a, -17); // expected-error {{argument should be a value from 0 to 15}} + int_r = __msa_copy_u_h(v8u16_a, -8); // expected-error {{argument should be a value from 0 to 7}} + int_r = __msa_copy_u_w(v4u32_a, -4); // expected-error {{argument should be a value from 0 to 3}} + ll_r = __msa_copy_u_d(v2i64_a, -2); // expected-error {{argument should be a value from 0 to 1}} + + v16i8_r = __msa_insve_b(v16i8_r, 16, v16i8_a); // expected-error {{argument should be a value from 0 to 15}} + v8i16_r = __msa_insve_h(v8i16_r, 8, v8i16_a); // expected-error {{argument should be a value from 0 to 7}} + v4i32_r = __msa_insve_w(v4i32_r, 4, v4i32_a); // expected-error {{argument should be a value from 0 to 3}} + v2i64_r = __msa_insve_d(v2i64_r, 2, v2i64_a); // expected-error {{argument should be a value from 0 to 1}} + + v16i8_r = __msa_ld_b(&v16i8_a, -513); // expected-error {{argument should be a value from -512 to 511}} + v8i16_r = __msa_ld_h(&v8i16_a, -513); // expected-error {{argument should be a value from -512 to 511}} + v4i32_r = __msa_ld_w(&v4i32_a, -513); // expected-error {{argument should be a value from -512 to 511}} + v2i64_r = __msa_ld_d(&v2i64_a, -513); // expected-error {{argument should be a value from -512 to 511}} + + v16i8_r = __msa_ldi_b(-513); // expected-error {{argument should be a value from -512 to 511}} + v8i16_r = __msa_ldi_h(-513); // expected-error {{argument should be a value from -512 to 511}} + v4i32_r = __msa_ldi_w(-513); // expected-error {{argument should be a value from -512 to 511}} + v2i64_r = __msa_ldi_d(-513); // expected-error {{argument should be a value from -512 to 511}} + + v16i8_r = __msa_maxi_s_b(v16i8_a, -17); // expected-error {{argument should be a value from -16 to 15}} + v8i16_r = __msa_maxi_s_h(v8i16_a, -17); // expected-error {{argument should be a value from -16 to 15}} + v4i32_r = __msa_maxi_s_w(v4i32_a, -17); // expected-error {{argument should be a value from -16 to 15}} + v2i64_r = __msa_maxi_s_d(v2i64_a, -17); // expected-error {{argument should be a value from -16 to 15}} + + v16u8_r = __msa_maxi_u_b(v16u8_a, -1); // expected-error {{argument should be a value from 0 to 31}} + v8u16_r = __msa_maxi_u_h(v8u16_a, -1); // expected-error {{argument should be a value from 0 to 31}} + v4u32_r = __msa_maxi_u_w(v4u32_a, -1); // expected-error {{argument should be a value from 0 to 31}} + v2u64_r = __msa_maxi_u_d(v2u64_a, -1); // expected-error {{argument should be a value from 0 to 31}} + + v16i8_r = __msa_mini_s_b(v16i8_a, -17); // expected-error {{argument should be a value from -16 to 15}} + v8i16_r = __msa_mini_s_h(v8i16_a, -17); // expected-error {{argument should be a value from -16 to 15}} + v4i32_r = __msa_mini_s_w(v4i32_a, -17); // expected-error {{argument should be a value from -16 to 15}} + v2i64_r = __msa_mini_s_d(v2i64_a, -17); // expected-error {{argument should be a value from -16 to 15}} + + v16u8_r = __msa_mini_u_b(v16u8_a, -1); // expected-error {{argument should be a value from 0 to 31}} + v8u16_r = __msa_mini_u_h(v8u16_a, -1); // expected-error {{argument should be a value from 0 to 31}} + v4u32_r = __msa_mini_u_w(v4u32_a, -1); // expected-error {{argument should be a value from 0 to 31}} + v2u64_r = __msa_mini_u_d(v2u64_a, -1); // expected-error {{argument should be a value from 0 to 31}} + + v16i8_r = __msa_nori_b(v16i8_a, -1); // CHECK: warning: argument should be a value from 0 to 255}} + + v16i8_r = __msa_ori_b(v16i8_a, -1); // CHECK: warning: argument should be a value from 0 to 255}} + + v16i8_r = __msa_sat_s_b(v16i8_a, -1); // expected-error {{argument should be a value from 0 to 7}} + v8i16_r = __msa_sat_s_h(v8i16_a, -1); // expected-error {{argument should be a value from 0 to 15}} + v4i32_r = __msa_sat_s_w(v4i32_a, -1); // expected-error {{argument should be a value from 0 to 31}} + v2i64_r = __msa_sat_s_d(v2i64_a, -1); // expected-error {{argument should be a value from 0 to 63}} + + v16i8_r = __msa_sat_u_b(v16i8_a, -8); // expected-error {{argument should be a value from 0 to 7}} + v8i16_r = __msa_sat_u_h(v8i16_a, -17); // expected-error {{argument should be a value from 0 to 15}} + v4i32_r = __msa_sat_u_w(v4i32_a, -32); // expected-error {{argument should be a value from 0 to 31}} + v2i64_r = __msa_sat_u_d(v2i64_a, -64); // expected-error {{argument should be a value from 0 to 63}} + + v16i8_r = __msa_shf_b(v16i8_a, -1); // CHECK: warning: argument should be a value from 0 to 255}} + v8i16_r = __msa_shf_h(v8i16_a, -1); // CHECK: warning: argument should be a value from 0 to 255}} + v4i32_r = __msa_shf_w(v4i32_a, -1); // CHECK: warning: argument should be a value from 0 to 255}} + + v16i8_r = __msa_sld_b(v16i8_r, v16i8_a, -17); // expected-error {{argument should be a value from 0 to 15}} + v8i16_r = __msa_sld_h(v8i16_r, v8i16_a, -8); // expected-error {{argument should be a value from 0 to 7}} + v4i32_r = __msa_sld_w(v4i32_r, v4i32_a, -4); // expected-error {{argument should be a value from 0 to 3}} + v2i64_r = __msa_sld_d(v2i64_r, v2i64_a, -2); // expected-error {{argument should be a value from 0 to 1}} + + v16i8_r = __msa_sldi_b(v16i8_r, v16i8_a, -17); // expected-error {{argument should be a value from 0 to 15}} + v8i16_r = __msa_sldi_h(v8i16_r, v8i16_a, -8); // expected-error {{argument should be a value from 0 to 7}} + v4i32_r = __msa_sldi_w(v4i32_r, v4i32_a, -4); // expected-error {{argument should be a value from 0 to 3}} + v2i64_r = __msa_sldi_d(v2i64_r, v2i64_a, -2); // expected-error {{argument should be a value from 0 to 1}} + + v16i8_r = __msa_slli_b(v16i8_a, -8); // expected-error {{argument should be a value from 0 to 7}} + v8i16_r = __msa_slli_h(v8i16_a, -17); // expected-error {{argument should be a value from 0 to 15}} + v4i32_r = __msa_slli_w(v4i32_a, -32); // expected-error {{argument should be a value from 0 to 31}} + v2i64_r = __msa_slli_d(v2i64_a, -64); // expected-error {{argument should be a value from 0 to 63}} + + v16i8_r = __msa_splati_b(v16i8_a, -17); // expected-error {{argument should be a value from 0 to 15}} + v8i16_r = __msa_splati_h(v8i16_a, -8); // expected-error {{argument should be a value from 0 to 7}} + v4i32_r = __msa_splati_w(v4i32_a, -4); // expected-error {{argument should be a value from 0 to 3}} + v2i64_r = __msa_splati_d(v2i64_a, -2); // expected-error {{argument should be a value from 0 to 1}} + + v16i8_r = __msa_srai_b(v16i8_a, -8); // expected-error {{argument should be a value from 0 to 7}} + v8i16_r = __msa_srai_h(v8i16_a, -17); // expected-error {{argument should be a value from 0 to 15}} + v4i32_r = __msa_srai_w(v4i32_a, -32); // expected-error {{argument should be a value from 0 to 31}} + v2i64_r = __msa_srai_d(v2i64_a, -64); // expected-error {{argument should be a value from 0 to 63}} + + v16i8_r = __msa_srari_b(v16i8_a, -8); // expected-error {{argument should be a value from 0 to 7}} + v8i16_r = __msa_srari_h(v8i16_a, -17); // expected-error {{argument should be a value from 0 to 15}} + v4i32_r = __msa_srari_w(v4i32_a, -32); // expected-error {{argument should be a value from 0 to 31}} + v2i64_r = __msa_srari_d(v2i64_a, -64); // expected-error {{argument should be a value from 0 to 63}} + + v16i8_r = __msa_srli_b(v16i8_a, -8); // expected-error {{argument should be a value from 0 to 7}} + v8i16_r = __msa_srli_h(v8i16_a, -17); // expected-error {{argument should be a value from 0 to 15}} + v4i32_r = __msa_srli_w(v4i32_a, -32); // expected-error {{argument should be a value from 0 to 31}} + v2i64_r = __msa_srli_d(v2i64_a, -64); // expected-error {{argument should be a value from 0 to 63}} + + v16i8_r = __msa_srlri_b(v16i8_a, -8); // expected-error {{argument should be a value from 0 to 7}} + v8i16_r = __msa_srlri_h(v8i16_a, -17); // expected-error {{argument should be a value from 0 to 15}} + v4i32_r = __msa_srlri_w(v4i32_a, -32); // expected-error {{argument should be a value from 0 to 31}} + v2i64_r = __msa_srlri_d(v2i64_a, -64); // expected-error {{argument should be a value from 0 to 63}} + + __msa_st_b(v16i8_b, &v16i8_a, -513); // expected-error {{argument should be a value from -512 to 511}} + __msa_st_h(v8i16_b, &v8i16_a, -513); // expected-error {{argument should be a value from -512 to 511}} + __msa_st_w(v4i32_b, &v4i32_a, -513); // expected-error {{argument should be a value from -512 to 511}} + __msa_st_d(v2i64_b, &v2i64_a, -513); // expected-error {{argument should be a value from -512 to 511}} + + v16i8_r = __msa_subvi_b(v16i8_a, -1); // expected-error {{argument should be a value from 0 to 31}} + v8i16_r = __msa_subvi_h(v8i16_a, -1); // expected-error {{argument should be a value from 0 to 31}} + v4i32_r = __msa_subvi_w(v4i32_a, -1); // expected-error {{argument should be a value from 0 to 31}} + v2i64_r = __msa_subvi_d(v2i64_a, -1); // expected-error {{argument should be a value from 0 to 31}} + + v16i8_r = __msa_xori_b(v16i8_a, -1); // CHECK: warning: argument should be a value from 0 to 255}} + v8i16_r = __msa_xori_b(v8i16_a, -1); // CHECK: warning: argument should be a value from 0 to 255}} + v4i32_r = __msa_xori_b(v4i32_a, -1); // CHECK: warning: argument should be a value from 0 to 255}} + v2i64_r = __msa_xori_b(v2i64_a, -1); // CHECK: warning: argument should be a value from 0 to 255}} + + v16u8_r = __msa_xori_b(v16u8_a, -1); // CHECK: warning: argument should be a value from 0 to 255}} + v8u16_r = __msa_xori_b(v8u16_a, -1); // CHECK: warning: argument should be a value from 0 to 255}} + v4u32_r = __msa_xori_b(v4u32_a, -1); // CHECK: warning: argument should be a value from 0 to 255}} + v2u64_r = __msa_xori_b(v2u64_a, -1); // CHECK: warning: argument should be a value from 0 to 255}} + +} Index: test/CodeGen/builtins-mips-msa.c =================================================================== --- test/CodeGen/builtins-mips-msa.c +++ test/CodeGen/builtins-mips-msa.c @@ -138,8 +138,8 @@ v4i32_r = __msa_bclr_w(v4i32_a, v4i32_b); // CHECK: call <4 x i32> @llvm.mips.bclr.w( v2i64_r = __msa_bclr_d(v2i64_a, v2i64_b); // CHECK: call <2 x i64> @llvm.mips.bclr.d( - v16i8_r = __msa_bclri_b(v16i8_a, 25); // CHECK: call <16 x i8> @llvm.mips.bclri.b( - v8i16_r = __msa_bclri_h(v8i16_a, 25); // CHECK: call <8 x i16> @llvm.mips.bclri.h( + v16i8_r = __msa_bclri_b(v16i8_a, 3); // CHECK: call <16 x i8> @llvm.mips.bclri.b( + v8i16_r = __msa_bclri_h(v8i16_a, 8); // CHECK: call <8 x i16> @llvm.mips.bclri.h( v4i32_r = __msa_bclri_w(v4i32_a, 25); // CHECK: call <4 x i32> @llvm.mips.bclri.w( v2i64_r = __msa_bclri_d(v2i64_a, 25); // CHECK: call <2 x i64> @llvm.mips.bclri.d( @@ -148,8 +148,8 @@ v4i32_r = __msa_binsl_w(v4i32_r, v4i32_a, v4i32_b); // CHECK: call <4 x i32> @llvm.mips.binsl.w( v2i64_r = __msa_binsl_d(v2i64_r, v2i64_a, v2i64_b); // CHECK: call <2 x i64> @llvm.mips.binsl.d( - v16i8_r = __msa_binsli_b(v16i8_r, v16i8_a, 25); // CHECK: call <16 x i8> @llvm.mips.binsli.b( - v8i16_r = __msa_binsli_h(v8i16_r, v8i16_a, 25); // CHECK: call <8 x i16> @llvm.mips.binsli.h( + v16i8_r = __msa_binsli_b(v16i8_r, v16i8_a, 3); // CHECK: call <16 x i8> @llvm.mips.binsli.b( + v8i16_r = __msa_binsli_h(v8i16_r, v8i16_a, 8); // CHECK: call <8 x i16> @llvm.mips.binsli.h( v4i32_r = __msa_binsli_w(v4i32_r, v4i32_a, 25); // CHECK: call <4 x i32> @llvm.mips.binsli.w( v2i64_r = __msa_binsli_d(v2i64_r, v2i64_a, 25); // CHECK: call <2 x i64> @llvm.mips.binsli.d( @@ -158,8 +158,8 @@ v4i32_r = __msa_binsr_w(v4i32_r, v4i32_a, v4i32_b); // CHECK: call <4 x i32> @llvm.mips.binsr.w( v2i64_r = __msa_binsr_d(v2i64_r, v2i64_a, v2i64_b); // CHECK: call <2 x i64> @llvm.mips.binsr.d( - v16i8_r = __msa_binsri_b(v16i8_r, v16i8_a, 25); // CHECK: call <16 x i8> @llvm.mips.binsri.b( - v8i16_r = __msa_binsri_h(v8i16_r, v8i16_a, 25); // CHECK: call <8 x i16> @llvm.mips.binsri.h( + v16i8_r = __msa_binsri_b(v16i8_r, v16i8_a, 5); // CHECK: call <16 x i8> @llvm.mips.binsri.b( + v8i16_r = __msa_binsri_h(v8i16_r, v8i16_a, 15); // CHECK: call <8 x i16> @llvm.mips.binsri.h( v4i32_r = __msa_binsri_w(v4i32_r, v4i32_a, 25); // CHECK: call <4 x i32> @llvm.mips.binsri.w( v2i64_r = __msa_binsri_d(v2i64_r, v2i64_a, 25); // CHECK: call <2 x i64> @llvm.mips.binsri.d( @@ -182,8 +182,8 @@ v4i32_r = __msa_bneg_w(v4i32_a, v4i32_b); // CHECK: call <4 x i32> @llvm.mips.bneg.w( v2i64_r = __msa_bneg_d(v2i64_a, v2i64_b); // CHECK: call <2 x i64> @llvm.mips.bneg.d( - v16i8_r = __msa_bnegi_b(v16i8_a, 25); // CHECK: call <16 x i8> @llvm.mips.bnegi.b( - v8i16_r = __msa_bnegi_h(v8i16_a, 25); // CHECK: call <8 x i16> @llvm.mips.bnegi.h( + v16i8_r = __msa_bnegi_b(v16i8_a, 6); // CHECK: call <16 x i8> @llvm.mips.bnegi.b( + v8i16_r = __msa_bnegi_h(v8i16_a, 14); // CHECK: call <8 x i16> @llvm.mips.bnegi.h( v4i32_r = __msa_bnegi_w(v4i32_a, 25); // CHECK: call <4 x i32> @llvm.mips.bnegi.w( v2i64_r = __msa_bnegi_d(v2i64_a, 25); // CHECK: call <2 x i64> @llvm.mips.bnegi.d( @@ -206,8 +206,8 @@ v4i32_r = __msa_bset_w(v4i32_a, v4i32_b); // CHECK: call <4 x i32> @llvm.mips.bset.w( v2i64_r = __msa_bset_d(v2i64_a, v2i64_b); // CHECK: call <2 x i64> @llvm.mips.bset.d( - v16i8_r = __msa_bseti_b(v16i8_a, 25); // CHECK: call <16 x i8> @llvm.mips.bseti.b( - v8i16_r = __msa_bseti_h(v8i16_a, 25); // CHECK: call <8 x i16> @llvm.mips.bseti.h( + v16i8_r = __msa_bseti_b(v16i8_a, 5); // CHECK: call <16 x i8> @llvm.mips.bseti.b( + v8i16_r = __msa_bseti_h(v8i16_a, 15); // CHECK: call <8 x i16> @llvm.mips.bseti.h( v4i32_r = __msa_bseti_w(v4i32_a, 25); // CHECK: call <4 x i32> @llvm.mips.bseti.w( v2i64_r = __msa_bseti_d(v2i64_a, 25); // CHECK: call <2 x i64> @llvm.mips.bseti.d( @@ -223,10 +223,10 @@ v4i32_r = __msa_ceq_w(v4i32_a, v4i32_b); // CHECK: call <4 x i32> @llvm.mips.ceq.w( v2i64_r = __msa_ceq_d(v2i64_a, v2i64_b); // CHECK: call <2 x i64> @llvm.mips.ceq.d( - v16i8_r = __msa_ceqi_b(v16i8_a, 25); // CHECK: call <16 x i8> @llvm.mips.ceqi.b( - v8i16_r = __msa_ceqi_h(v8i16_a, 25); // CHECK: call <8 x i16> @llvm.mips.ceqi.h( - v4i32_r = __msa_ceqi_w(v4i32_a, 25); // CHECK: call <4 x i32> @llvm.mips.ceqi.w( - v2i64_r = __msa_ceqi_d(v2i64_a, 25); // CHECK: call <2 x i64> @llvm.mips.ceqi.d( + v16i8_r = __msa_ceqi_b(v16i8_a, -3); // CHECK: call <16 x i8> @llvm.mips.ceqi.b( + v8i16_r = __msa_ceqi_h(v8i16_a, -12); // CHECK: call <8 x i16> @llvm.mips.ceqi.h( + v4i32_r = __msa_ceqi_w(v4i32_a, 14); // CHECK: call <4 x i32> @llvm.mips.ceqi.w( + v2i64_r = __msa_ceqi_d(v2i64_a, 15); // CHECK: call <2 x i64> @llvm.mips.ceqi.d( int_r = __msa_cfcmsa(1); // CHECK: call i32 @llvm.mips.cfcmsa( @@ -240,10 +240,10 @@ v4u32_r = __msa_cle_u_w(v4u32_a, v4u32_b); // CHECK: call <4 x i32> @llvm.mips.cle.u.w( v2u64_r = __msa_cle_u_d(v2u64_a, v2u64_b); // CHECK: call <2 x i64> @llvm.mips.cle.u.d( - v16i8_r = __msa_clei_s_b(v16i8_a, 25); // CHECK: call <16 x i8> @llvm.mips.clei.s.b( - v8i16_r = __msa_clei_s_h(v8i16_a, 25); // CHECK: call <8 x i16> @llvm.mips.clei.s.h( - v4i32_r = __msa_clei_s_w(v4i32_a, 25); // CHECK: call <4 x i32> @llvm.mips.clei.s.w( - v2i64_r = __msa_clei_s_d(v2i64_a, 25); // CHECK: call <2 x i64> @llvm.mips.clei.s.d( + v16i8_r = __msa_clei_s_b(v16i8_a, 12); // CHECK: call <16 x i8> @llvm.mips.clei.s.b( + v8i16_r = __msa_clei_s_h(v8i16_a, 13); // CHECK: call <8 x i16> @llvm.mips.clei.s.h( + v4i32_r = __msa_clei_s_w(v4i32_a, 14); // CHECK: call <4 x i32> @llvm.mips.clei.s.w( + v2i64_r = __msa_clei_s_d(v2i64_a, 15); // CHECK: call <2 x i64> @llvm.mips.clei.s.d( v16u8_r = __msa_clei_u_b(v16u8_a, 25); // CHECK: call <16 x i8> @llvm.mips.clei.u.b( v8u16_r = __msa_clei_u_h(v8u16_a, 25); // CHECK: call <8 x i16> @llvm.mips.clei.u.h( @@ -260,10 +260,10 @@ v4u32_r = __msa_clt_u_w(v4u32_a, v4u32_b); // CHECK: call <4 x i32> @llvm.mips.clt.u.w( v2u64_r = __msa_clt_u_d(v2u64_a, v2u64_b); // CHECK: call <2 x i64> @llvm.mips.clt.u.d( - v16i8_r = __msa_clti_s_b(v16i8_a, 25); // CHECK: call <16 x i8> @llvm.mips.clti.s.b( - v8i16_r = __msa_clti_s_h(v8i16_a, 25); // CHECK: call <8 x i16> @llvm.mips.clti.s.h( - v4i32_r = __msa_clti_s_w(v4i32_a, 25); // CHECK: call <4 x i32> @llvm.mips.clti.s.w( - v2i64_r = __msa_clti_s_d(v2i64_a, 25); // CHECK: call <2 x i64> @llvm.mips.clti.s.d( + v16i8_r = __msa_clti_s_b(v16i8_a, 15); // CHECK: call <16 x i8> @llvm.mips.clti.s.b( + v8i16_r = __msa_clti_s_h(v8i16_a, 15); // CHECK: call <8 x i16> @llvm.mips.clti.s.h( + v4i32_r = __msa_clti_s_w(v4i32_a, 15); // CHECK: call <4 x i32> @llvm.mips.clti.s.w( + v2i64_r = __msa_clti_s_d(v2i64_a, 15); // CHECK: call <2 x i64> @llvm.mips.clti.s.d( v16u8_r = __msa_clti_u_b(v16u8_a, 25); // CHECK: call <16 x i8> @llvm.mips.clti.u.b( v8u16_r = __msa_clti_u_h(v8u16_a, 25); // CHECK: call <8 x i16> @llvm.mips.clti.u.h( @@ -387,11 +387,11 @@ v4i32_r = __msa_fill_w(3); // CHECK: call <4 x i32> @llvm.mips.fill.w( v2i64_r = __msa_fill_d(3); // CHECK: call <2 x i64> @llvm.mips.fill.d( - v4f32_r = __msa_flog2_w(v8f16_a); // CHECK: call <4 x float> @llvm.mips.flog2.w( - v2f64_r = __msa_flog2_d(v4f32_a); // CHECK: call <2 x double> @llvm.mips.flog2.d( + v4f32_r = __msa_flog2_w(v4f32_a); // CHECK: call <4 x float> @llvm.mips.flog2.w( + v2f64_r = __msa_flog2_d(v2f64_a); // CHECK: call <2 x double> @llvm.mips.flog2.d( - v4f32_r = __msa_fmadd_w(v8f16_r, v8f16_a, v8f16_b); // CHECK: call <4 x float> @llvm.mips.fmadd.w( - v2f64_r = __msa_fmadd_d(v4f32_r, v4f32_a, v4f32_b); // CHECK: call <2 x double> @llvm.mips.fmadd.d( + v4f32_r = __msa_fmadd_w(v4f32_r, v4f32_a, v4f32_b); // CHECK: call <4 x float> @llvm.mips.fmadd.w( + v2f64_r = __msa_fmadd_d(v2f64_r, v2f64_a, v2f64_b); // CHECK: call <2 x double> @llvm.mips.fmadd.d( v4f32_r = __msa_fmax_w(v4f32_a, v4f32_b); // CHECK: call <4 x float> @llvm.mips.fmax.w( v2f64_r = __msa_fmax_d(v2f64_a, v2f64_b); // CHECK: call <2 x double> @llvm.mips.fmax.d( @@ -405,20 +405,20 @@ v4f32_r = __msa_fmin_a_w(v4f32_a, v4f32_b); // CHECK: call <4 x float> @llvm.mips.fmin.a.w( v2f64_r = __msa_fmin_a_d(v2f64_a, v2f64_b); // CHECK: call <2 x double> @llvm.mips.fmin.a.d( - v4f32_r = __msa_fmsub_w(v8f16_r, v8f16_a, v8f16_b); // CHECK: call <4 x float> @llvm.mips.fmsub.w( - v2f64_r = __msa_fmsub_d(v4f32_r, v4f32_a, v4f32_b); // CHECK: call <2 x double> @llvm.mips.fmsub.d( + v4f32_r = __msa_fmsub_w(v4f32_r, v4f32_a, v4f32_b); // CHECK: call <4 x float> @llvm.mips.fmsub.w( + v2f64_r = __msa_fmsub_d(v2f64_r, v2f64_a, v2f64_b); // CHECK: call <2 x double> @llvm.mips.fmsub.d( v4f32_r = __msa_fmul_w(v4f32_a, v4f32_b); // CHECK: call <4 x float> @llvm.mips.fmul.w( v2f64_r = __msa_fmul_d(v2f64_a, v2f64_b); // CHECK: call <2 x double> @llvm.mips.fmul.d( - v4f32_r = __msa_frint_w(v8f16_a); // CHECK: call <4 x float> @llvm.mips.frint.w( - v2f64_r = __msa_frint_d(v4f32_a); // CHECK: call <2 x double> @llvm.mips.frint.d( + v4f32_r = __msa_frint_w(v4f32_a); // CHECK: call <4 x float> @llvm.mips.frint.w( + v2f64_r = __msa_frint_d(v2f64_a); // CHECK: call <2 x double> @llvm.mips.frint.d( - v4f32_r = __msa_frcp_w(v8f16_a); // CHECK: call <4 x float> @llvm.mips.frcp.w( - v2f64_r = __msa_frcp_d(v4f32_a); // CHECK: call <2 x double> @llvm.mips.frcp.d( + v4f32_r = __msa_frcp_w(v4f32_a); // CHECK: call <4 x float> @llvm.mips.frcp.w( + v2f64_r = __msa_frcp_d(v2f64_a); // CHECK: call <2 x double> @llvm.mips.frcp.d( - v4f32_r = __msa_frsqrt_w(v8f16_a); // CHECK: call <4 x float> @llvm.mips.frsqrt.w( - v2f64_r = __msa_frsqrt_d(v4f32_a); // CHECK: call <2 x double> @llvm.mips.frsqrt.d( + v4f32_r = __msa_frsqrt_w(v4f32_a); // CHECK: call <4 x float> @llvm.mips.frsqrt.w( + v2f64_r = __msa_frsqrt_d(v2f64_a); // CHECK: call <2 x double> @llvm.mips.frsqrt.d( v4i32_r = __msa_fseq_w(v4f32_a, v4f32_b); // CHECK: call <4 x i32> @llvm.mips.fseq.w( v2i64_r = __msa_fseq_d(v2f64_a, v2f64_b); // CHECK: call <2 x i64> @llvm.mips.fseq.d( @@ -438,8 +438,8 @@ v4i32_r = __msa_fsor_w(v4f32_a, v4f32_b); // CHECK: call <4 x i32> @llvm.mips.fsor.w( v2i64_r = __msa_fsor_d(v2f64_a, v2f64_b); // CHECK: call <2 x i64> @llvm.mips.fsor.d( - v4f32_r = __msa_fsqrt_w(v8f16_a); // CHECK: call <4 x float> @llvm.mips.fsqrt.w( - v2f64_r = __msa_fsqrt_d(v4f32_a); // CHECK: call <2 x double> @llvm.mips.fsqrt.d( + v4f32_r = __msa_fsqrt_w(v4f32_a); // CHECK: call <4 x float> @llvm.mips.fsqrt.w( + v2f64_r = __msa_fsqrt_d(v2f64_a); // CHECK: call <2 x double> @llvm.mips.fsqrt.d( v4f32_r = __msa_fsub_w(v4f32_a, v4f32_b); // CHECK: call <4 x float> @llvm.mips.fsub.w( v2f64_r = __msa_fsub_d(v2f64_a, v2f64_b); // CHECK: call <2 x double> @llvm.mips.fsub.d( @@ -694,15 +694,15 @@ v8i16_r = __msa_shf_h(v8i16_a, 3); // CHECK: call <8 x i16> @llvm.mips.shf.h( v4i32_r = __msa_shf_w(v4i32_a, 3); // CHECK: call <4 x i32> @llvm.mips.shf.w( - v16i8_r = __msa_sld_b(v16i8_r, v16i8_a, 10); // CHECK: call <16 x i8> @llvm.mips.sld.b( - v8i16_r = __msa_sld_h(v8i16_r, v8i16_a, 10); // CHECK: call <8 x i16> @llvm.mips.sld.h( - v4i32_r = __msa_sld_w(v4i32_r, v4i32_a, 10); // CHECK: call <4 x i32> @llvm.mips.sld.w( - v2i64_r = __msa_sld_d(v2i64_r, v2i64_a, 10); // CHECK: call <2 x i64> @llvm.mips.sld.d( + v16i8_r = __msa_sld_b(v16i8_r, v16i8_a, 7); // CHECK: call <16 x i8> @llvm.mips.sld.b( + v8i16_r = __msa_sld_h(v8i16_r, v8i16_a, 5); // CHECK: call <8 x i16> @llvm.mips.sld.h( + v4i32_r = __msa_sld_w(v4i32_r, v4i32_a, 3); // CHECK: call <4 x i32> @llvm.mips.sld.w( + v2i64_r = __msa_sld_d(v2i64_r, v2i64_a, 1); // CHECK: call <2 x i64> @llvm.mips.sld.d( - v16i8_r = __msa_sldi_b(v16i8_r, v16i8_a, 3); // CHECK: call <16 x i8> @llvm.mips.sldi.b( + v16i8_r = __msa_sldi_b(v16i8_r, v16i8_a, 7); // CHECK: call <16 x i8> @llvm.mips.sldi.b( v8i16_r = __msa_sldi_h(v8i16_r, v8i16_a, 3); // CHECK: call <8 x i16> @llvm.mips.sldi.h( - v4i32_r = __msa_sldi_w(v4i32_r, v4i32_a, 3); // CHECK: call <4 x i32> @llvm.mips.sldi.w( - v2i64_r = __msa_sldi_d(v2i64_r, v2i64_a, 3); // CHECK: call <2 x i64> @llvm.mips.sldi.d( + v4i32_r = __msa_sldi_w(v4i32_r, v4i32_a, 2); // CHECK: call <4 x i32> @llvm.mips.sldi.w( + v2i64_r = __msa_sldi_d(v2i64_r, v2i64_a, 1); // CHECK: call <2 x i64> @llvm.mips.sldi.d( v16i8_r = __msa_sll_b(v16i8_a, v16i8_b); // CHECK: call <16 x i8> @llvm.mips.sll.b( v8i16_r = __msa_sll_h(v8i16_a, v8i16_b); // CHECK: call <8 x i16> @llvm.mips.sll.h( @@ -722,7 +722,7 @@ v16i8_r = __msa_splati_b(v16i8_a, 3); // CHECK: call <16 x i8> @llvm.mips.splati.b( v8i16_r = __msa_splati_h(v8i16_a, 3); // CHECK: call <8 x i16> @llvm.mips.splati.h( v4i32_r = __msa_splati_w(v4i32_a, 3); // CHECK: call <4 x i32> @llvm.mips.splati.w( - v2i64_r = __msa_splati_d(v2i64_a, 3); // CHECK: call <2 x i64> @llvm.mips.splati.d( + v2i64_r = __msa_splati_d(v2i64_a, 1); // CHECK: call <2 x i64> @llvm.mips.splati.d( v16i8_r = __msa_sra_b(v16i8_a, v16i8_b); // CHECK: call <16 x i8> @llvm.mips.sra.b( v8i16_r = __msa_sra_h(v8i16_a, v8i16_b); // CHECK: call <8 x i16> @llvm.mips.sra.h(