Index: include/llvm/Support/AArch64TargetParser.def
===================================================================
--- include/llvm/Support/AArch64TargetParser.def
+++ include/llvm/Support/AArch64TargetParser.def
@@ -70,6 +70,8 @@
                 (AArch64::AEK_SIMD | AArch64::AEK_CRC | AArch64::AEK_CRYPTO))
 AARCH64_CPU_NAME("vulcan", AK_ARMV8_1A, FK_CRYPTO_NEON_FP_ARMV8, false,
                 (AArch64::AEK_SIMD | AArch64::AEK_CRC | AArch64::AEK_CRYPTO))
+AARCH64_CPU_NAME("xgene1", AK_ARMV8A, FK_NEON_FP_ARMV8, false,
+                (AArch64::AEK_SIMD | AArch64::AEK_FP))
 // Invalid CPU
 AARCH64_CPU_NAME("invalid", AK_INVALID, FK_INVALID, true, AArch64::AEK_INVALID)
 #undef AARCH64_CPU_NAME
Index: include/llvm/Support/ARMTargetParser.def
===================================================================
--- include/llvm/Support/ARMTargetParser.def
+++ include/llvm/Support/ARMTargetParser.def
@@ -233,6 +233,8 @@
 ARM_CPU_NAME("cyclone", AK_ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false, ARM::AEK_CRC)
 ARM_CPU_NAME("exynos-m1", AK_ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false, ARM::AEK_CRC)
 ARM_CPU_NAME("exynos-m2", AK_ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false, ARM::AEK_CRC)
+ARM_CPU_NAME("xgene1", AK_ARMV8A, FK_NEON_FP_ARMV8, false, 
+	ARM::AEK_FP | ARM::AEK_SIMD)
 // Non-standard Arch names.
 ARM_CPU_NAME("iwmmxt", AK_IWMMXT, FK_NONE, true, ARM::AEK_NONE)
 ARM_CPU_NAME("xscale", AK_XSCALE, FK_NONE, true, ARM::AEK_NONE)
Index: include/llvm/Support/TargetParser.h
===================================================================
--- include/llvm/Support/TargetParser.h
+++ include/llvm/Support/TargetParser.h
@@ -162,7 +162,7 @@
   AEK_SIMD = 0x10,
   AEK_FP16 = 0x20,
   AEK_PROFILE = 0x40,
-  AEK_RAS = 0x80
+  AEK_RAS = 0x80,
 };
 
 StringRef getCanonicalArchName(StringRef Arch);
Index: lib/Target/AArch64/AArch64.td
===================================================================
--- lib/Target/AArch64/AArch64.td
+++ lib/Target/AArch64/AArch64.td
@@ -250,6 +250,13 @@
                                    FeaturePredictableSelectIsExpensive,
                                    HasV8_1aOps]>;
 
+def ProcXGene1     : SubtargetFeature<"xgene1", "ARMProcFamily", "XGene1",
+                                   "AppliedMicro (APM) X-Gene-1 processors", [
+                                   FeatureFPARMv8,
+                                   FeatureNEON,
+                                   FeaturePerfMon
+                                   ]>;
+
 def : ProcessorModel<"generic", NoSchedModel, [
                      FeatureCRC,
                      FeatureFPARMv8,
@@ -270,6 +277,8 @@
 def : ProcessorModel<"exynos-m2", ExynosM1Model, [ProcExynosM1]>;
 def : ProcessorModel<"kryo", KryoModel, [ProcKryo]>;
 def : ProcessorModel<"vulcan", VulcanModel, [ProcVulcan]>;
+// FIXME: X-Gene-1 is currently modelled as generic schedule.
+def : ProcessorModel<"xgene1", NoSchedModel, [ProcXGene1]>;
 
 //===----------------------------------------------------------------------===//
 // Assembly parser
Index: lib/Target/AArch64/AArch64Subtarget.h
===================================================================
--- lib/Target/AArch64/AArch64Subtarget.h
+++ lib/Target/AArch64/AArch64Subtarget.h
@@ -44,7 +44,8 @@
     Cyclone,
     ExynosM1,
     Kryo,
-    Vulcan
+    Vulcan,
+    XGene1
   };
 
 protected:
Index: lib/Target/AArch64/AArch64Subtarget.cpp
===================================================================
--- lib/Target/AArch64/AArch64Subtarget.cpp
+++ lib/Target/AArch64/AArch64Subtarget.cpp
@@ -81,6 +81,7 @@
   case CortexA53: break;
   case CortexA72: break;
   case CortexA73: break;
+  case XGene1:	  break;
   case Others: break;
   }
 }
Index: lib/Target/ARM/ARM.td
===================================================================
--- lib/Target/ARM/ARM.td
+++ lib/Target/ARM/ARM.td
@@ -804,6 +804,10 @@
                                                          FeatureCrypto,
                                                          FeatureCRC]>;
 
+def : ProcNoItin<"xgene1",                              [ARMv8a, ProcXGene1,
+                                                         FeatureHWDiv,
+                                                         FeatureHWDivARM]>;
+
 //===----------------------------------------------------------------------===//
 // Register File Description
 //===----------------------------------------------------------------------===//
Index: lib/Target/ARM/ARMSubtarget.h
===================================================================
--- lib/Target/ARM/ARMSubtarget.h
+++ lib/Target/ARM/ARMSubtarget.h
@@ -45,7 +45,7 @@
     Others, CortexA5, CortexA7, CortexA8, CortexA9, CortexA12, CortexA15,
     CortexA17, CortexR4, CortexR4F, CortexR5, CortexR7, CortexM3,
     CortexA32, CortexA35, CortexA53, CortexA57, CortexA72, CortexA73,
-    Krait, Swift, ExynosM1
+    Krait, Swift, ExynosM1, XGene1
   };
   enum ARMProcClassEnum {
     None, AClass, RClass, MClass
Index: lib/Target/ARM/ARMSubtarget.cpp
===================================================================
--- lib/Target/ARM/ARMSubtarget.cpp
+++ lib/Target/ARM/ARMSubtarget.cpp
@@ -238,6 +238,7 @@
   case CortexA57:
   case CortexA72:
   case CortexA73:
+  case XGene1:
   case CortexR4:
   case CortexR4F:
   case CortexR5:
Index: tools/clang/test/Driver/aarch64-cpus.c
===================================================================
--- tools/clang/test/Driver/aarch64-cpus.c
+++ tools/clang/test/Driver/aarch64-cpus.c
@@ -283,3 +283,31 @@
 // RUN: %clang -target arm64 -mcpu=Cortex-A57 -### -c %s 2>&1 | FileCheck -check-prefix=CASE-INSENSITIVE-ARM64-CA57 %s
 // RUN: %clang -target arm64 -mtune=Cortex-A57 -### -c %s 2>&1 | FileCheck -check-prefix=CASE-INSENSITIVE-ARM64-CA57 %s
 // CASE-INSENSITIVE-ARM64-CA57: "-cc1"{{.*}} "-triple" "arm64{{.*}}" "-target-cpu" "cortex-a57"
+
+// RUN: %clang -target aarch64 -mcpu=xgene1 -### -c %s 2>&1 | FileCheck -check-prefix=XGENE1 %s
+// RUN: %clang -target aarch64 -mlittle-endian -mcpu=xgene1 -### -c %s 2>&1 | FileCheck -check-prefix=XGENE1 %s
+// RUN: %clang -target aarch64_be -mlittle-endian -mcpu=xgene1 -### -c %s 2>&1 | FileCheck -check-prefix=XGENE1 %s
+// RUN: %clang -target aarch64 -mtune=xgene1 -### -c %s 2>&1 | FileCheck -check-prefix=XGENE1 %s
+// RUN: %clang -target aarch64_be -mlittle-endian -mtune=xgene1 -### -c %s 2>&1 | FileCheck -check-prefix=XGENE1 %s
+// XGENE1: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-cpu" "xgene1"
+
+// RUN: %clang -target arm64 -mcpu=xgene1 -### -c %s 2>&1 | FileCheck -check-prefix=ARM64-XGENE1 %s
+// RUN: %clang -target arm64 -mlittle-endian -mcpu=xgene1 -### -c %s 2>&1 | FileCheck -check-prefix=ARM64-XGENE1 %s
+// RUN: %clang -target arm64 -mtune=xgene1 -### -c %s 2>&1 | FileCheck -check-prefix=ARM64-XGENE1 %s
+// RUN: %clang -target arm64 -mlittle-endian -mtune=xgene1 -### -c %s 2>&1 | FileCheck -check-prefix=ARM64-XGENE1 %s
+// ARM64-XGENE1: "-cc1"{{.*}} "-triple" "arm64{{.*}}" "-target-cpu" "xgene1"
+
+// RUN: %clang -target aarch64_be -mcpu=xgene1 -### -c %s 2>&1 | FileCheck -check-prefix=XGENE1-BE %s
+// RUN: %clang -target aarch64 -mbig-endian -mcpu=xgene1 -### -c %s 2>&1 | FileCheck -check-prefix=XGENE1-BE %s
+// RUN: %clang -target aarch64_be -mbig-endian -mcpu=xgene1 -### -c %s 2>&1 | FileCheck -check-prefix=XGENE1-BE %s
+// RUN: %clang -target aarch64_be -mtune=xgene1 -### -c %s 2>&1 | FileCheck -check-prefix=XGENE1-BE %s
+// RUN: %clang -target aarch64 -mbig-endian -mtune=xgene1 -### -c %s 2>&1 | FileCheck -check-prefix=XGENE1-BE %s
+// RUN: %clang -target aarch64_be -mbig-endian -mtune=xgene1 -### -c %s 2>&1 | FileCheck -check-prefix=XGENE1-BE %s
+// XGENE1-BE: "-cc1"{{.*}} "-triple" "aarch64_be{{.*}}" "-target-cpu" "xgene1"
+
+// RUN: %clang -target aarch64 -mcpu=vulcan -mtune=xgene1 -### -c %s 2>&1 | FileCheck -check-prefix=MCPU-MTUNE %s
+// RUN: %clang -target aarch64 -mtune=xgene1 -mcpu=vulcan  -### -c %s 2>&1 | FileCheck -check-prefix=MCPU-MTUNE %s
+// MCPU-MTUNE: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-cpu" "xgene1"
+
+// CASE-INSENSITIVE-XGENE1: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-cpu" "xgene1"
+// CASE-INSENSITIVE-ARM64-XGENE1: "-cc1"{{.*}} "-triple" "arm64{{.*}}" "-target-cpu" "xgene1"
Index: tools/clang/test/Frontend/aarch64-target-cpu.c
===================================================================
--- tools/clang/test/Frontend/aarch64-target-cpu.c
+++ tools/clang/test/Frontend/aarch64-target-cpu.c
@@ -10,5 +10,6 @@
 // RUN: %clang_cc1 -triple aarch64-unknown-unknown -target-cpu generic -verify %s
 // RUN: %clang_cc1 -triple aarch64-unknown-unknown -target-cpu kryo -verify %s
 // RUN: %clang_cc1 -triple aarch64-unknown-unknown -target-cpu vulcan -verify %s
+// RUN: %clang_cc1 -triple aarch64-unknown-unknown -target-cpu xgene1 -verify %s
 //
 // expected-no-diagnostics
Index: tools/clang/test/Preprocessor/aarch64-target-features.c
===================================================================
--- tools/clang/test/Preprocessor/aarch64-target-features.c
+++ tools/clang/test/Preprocessor/aarch64-target-features.c
@@ -97,6 +97,7 @@
 // RUN: %clang -target aarch64 -mcpu=exynos-m2 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-MCPU-M1 %s
 // RUN: %clang -target aarch64 -mcpu=kryo -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-MCPU-KRYO %s
 // RUN: %clang -target aarch64 -mcpu=vulcan -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-MCPU-VULCAN %s
+// RUN: %clang -target aarch64 -mcpu=xgene1 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-MCPU-XGENE1 %s
 // CHECK-MCPU-CYCLONE: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature" "+neon" "-target-feature" "+crypto" "-target-feature" "+zcm" "-target-feature" "+zcz"
 // CHECK-MCPU-A35: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature" "+neon" "-target-feature" "+crc" "-target-feature" "+crypto"
 // CHECK-MCPU-A53: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature" "+neon" "-target-feature" "+crc" "-target-feature" "+crypto"
@@ -106,6 +107,7 @@
 // CHECK-MCPU-M1: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature" "+neon" "-target-feature" "+crc" "-target-feature" "+crypto"
 // CHECK-MCPU-KRYO: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature" "+neon" "-target-feature" "+crc" "-target-feature" "+crypto"
 // CHECK-MCPU-VULCAN: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature" "+neon" "-target-feature" "+crc" "-target-feature" "+crypto"
+// CHECK-MCPU-XGENE1: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature" "+fp" "-target-feature" "+simd" "-target-feature" "+neon"
 
 // RUN: %clang -target x86_64-apple-macosx -arch arm64 -### -c %s 2>&1 | FileCheck --check-prefix=CHECK-ARCH-ARM64 %s
 // CHECK-ARCH-ARM64: "-target-cpu" "cyclone" "-target-feature" "+neon" "-target-feature" "+crypto" "-target-feature" "+zcm" "-target-feature" "+zcz"
Index: unittests/Support/TargetParserTest.cpp
===================================================================
--- unittests/Support/TargetParserTest.cpp
+++ unittests/Support/TargetParserTest.cpp
@@ -545,7 +545,8 @@
   const char *CPU[] = {"cortex-a35", "cortex-a53", "cortex-a57",
                        "cortex-a72", "cortex-a73", "cyclone",
                        "exynos-m1",  "exynos-m2",  "kryo",
-                       "vulcan"};
+                       "vulcan",
+		       "xgene1"};
 
   for (const auto &AArch64CPUName : kAArch64CPUNames)
     EXPECT_TRUE(contains(CPU, AArch64CPUName.Name)