Index: include/llvm/IR/IRBuilder.h
===================================================================
--- include/llvm/IR/IRBuilder.h
+++ include/llvm/IR/IRBuilder.h
@@ -703,6 +703,18 @@
                                     BranchWeights, Unpredictable));
   }
 
+  /// \brief Create a conditional 'br Cond, TrueDest, FalseDest'
+  /// instruction. Copy branch meta data if available.
+  BranchInst *CreateCondBr(Value *Cond, BasicBlock *True, BasicBlock *False,
+                           Instruction *MDSrc) {
+    BranchInst *Br = BranchInst::Create(True, False, Cond);
+    if (MDSrc) {
+      unsigned WL[2] = {LLVMContext::MD_prof, LLVMContext::MD_unpredictable};
+      Br->copyMetadata(*MDSrc, makeArrayRef(&WL[0], 2));
+    }
+    return Insert(Br);
+  }
+
   /// \brief Create a switch instruction with the specified value, default dest,
   /// and with a hint for the number of cases that will be added (for efficient
   /// allocation).
Index: lib/CodeGen/CodeGenPrepare.cpp
===================================================================
--- lib/CodeGen/CodeGenPrepare.cpp
+++ lib/CodeGen/CodeGenPrepare.cpp
@@ -4676,15 +4676,20 @@
   // of the condition, it means that side of the branch goes to the end block
   // directly and the path originates from the start block from the point of
   // view of the new PHI.
+  BasicBlock *TT, *FT;
   if (TrueBlock == nullptr) {
-    BranchInst::Create(EndBlock, FalseBlock, SI->getCondition(), SI);
+    TT = EndBlock;
+    FT = FalseBlock;
     TrueBlock = StartBlock;
   } else if (FalseBlock == nullptr) {
-    BranchInst::Create(TrueBlock, EndBlock, SI->getCondition(), SI);
+    TT = TrueBlock;
+    FT = EndBlock;
     FalseBlock = StartBlock;
   } else {
-    BranchInst::Create(TrueBlock, FalseBlock, SI->getCondition(), SI);
+    TT = TrueBlock;
+    FT = FalseBlock;
   }
+  IRBuilder<>(SI).CreateCondBr(SI->getCondition(), TT, FT, SI);
 
   // The select itself is replaced with a PHI Node.
   PHINode *PN = PHINode::Create(SI->getType(), 2, "", &EndBlock->front());
Index: test/CodeGen/X86/cmov-into-branch.ll
===================================================================
--- test/CodeGen/X86/cmov-into-branch.ll
+++ test/CodeGen/X86/cmov-into-branch.ll
@@ -103,11 +103,11 @@
 ; CHECK-LABEL: weighted_select3:
 ; CHECK:       # BB#0:
 ; CHECK-NEXT:    testl %edi, %edi
-; CHECK-NEXT:    jne [[LABEL_BB6:.*]]
-; CHECK:         movl %esi, %edi
-; CHECK-NEXT:  [[LABEL_BB6]]
-; CHECK-NEXT:    movl %edi, %eax
-; CHECK-NEXT:    retq
+; CHECK-NEXT:    je [[LABEL_BB6:.*]]
+; CHECK:         movl %edi, %eax
+; CHECK:         [[LABEL_BB6]]
+; CHECK-NEXT:    movl %esi, %edi
+; CHECK-NEXT:    jmp
 ;
   %cmp = icmp ne i32 %a, 0
   %sel = select i1 %cmp, i32 %a, i32 %b, !prof !2
Index: test/CodeGen/X86/select_meta.ll
===================================================================
--- test/CodeGen/X86/select_meta.ll
+++ test/CodeGen/X86/select_meta.ll
@@ -0,0 +1,23 @@
+; RUN: llc -mtriple=x86_64-unknown-unknown -print-after-all < %s 2>&1 | FileCheck %s
+
+; ModuleID = 'select_meta.cc'
+source_filename = "select_meta.cc"
+target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
+target triple = "x86_64-unknown-linux-gnu"
+
+; Function Attrs: norecurse nounwind readnone uwtable
+define i32 @_Z3fooiii(i32, i32, i32) local_unnamed_addr #0 {
+  %4 = and i32 %0, 3
+  %5 = icmp eq i32 %4, 1
+  %6 = select i1 %5, i32 %1, i32 %2, !prof  !1
+; CHECK: br {{.*}}label{{.*}}, label{{.*}}, !prof ![[WT:.*]]
+  ret i32 %6
+}
+
+attributes #0 = { norecurse nounwind readnone uwtable }
+
+!llvm.ident = !{!0}
+
+!0 = !{!"clang version 4.0.0 (trunk 279683)"}
+!1 = !{!"branch_weights", i32 1000, i32 1 }
+; CHECK ![[WT]] = !{!"branch_weights", i32 1000, i32 1 }