Index: lib/Target/AMDGPU/SIInstructions.td
===================================================================
--- lib/Target/AMDGPU/SIInstructions.td
+++ lib/Target/AMDGPU/SIInstructions.td
@@ -1810,9 +1810,9 @@
   let Uses = [EXEC];
 }
 
-let Uses = [EXEC], Defs = [EXEC, SCC] in {
+let Uses = [EXEC] in {
 
-let isBranch = 1, isTerminator = 1 in {
+let isBranch = 1, isTerminator = 1, Defs = [EXEC, SCC] in {
 
 def SI_IF: PseudoInstSI <
   (outs SReg_64:$dst), (ins SReg_64:$vcc, brtarget:$target),
@@ -1833,19 +1833,27 @@
   let Size = 8;
 }
 
-} // End isBranch = 1, isTerminator = 1
+def SI_END_CF : PseudoInstSI <
+  (outs), (ins SReg_64:$saved),
+  [(int_amdgcn_end_cf i64:$saved)]> {
+  let Size = 4;
+}
 
+} // End isBranch = 1, isTerminator = 1, Defs = [EXEC, SCC]
 
 def SI_BREAK : PseudoInstSI <
   (outs SReg_64:$dst), (ins SReg_64:$src),
   [(set i64:$dst, (int_amdgcn_break i64:$src))]> {
   let Size = 4;
+  let Defs = [SCC];
 }
 
+} // End Uses = [EXEC]
+
+let Defs = [SCC] in {
 def SI_IF_BREAK : PseudoInstSI <
   (outs SReg_64:$dst), (ins SReg_64:$vcc, SReg_64:$src),
-  [(set i64:$dst, (int_amdgcn_if_break i1:$vcc, i64:$src))]
-> {
+  [(set i64:$dst, (int_amdgcn_if_break i1:$vcc, i64:$src))]> {
   let Size = 4;
 }
 
@@ -1854,15 +1862,8 @@
   [(set i64:$dst, (int_amdgcn_else_break i64:$src0, i64:$src1))]> {
   let Size = 4;
 }
-
-def SI_END_CF : PseudoInstSI <
-  (outs), (ins SReg_64:$saved),
-  [(int_amdgcn_end_cf i64:$saved)]> {
-  let Size = 4;
 }
 
-} // End Uses = [EXEC], Defs = [EXEC, SCC]
-
 let Uses = [EXEC], Defs = [EXEC,VCC] in {
 def SI_KILL : PseudoInstSI <
   (outs), (ins VSrc_32:$src),