Index: llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
===================================================================
--- llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
+++ llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
@@ -578,8 +578,10 @@
     // Offset by 4, and don't encode the low two bits.
     return ((Value - 4) >> 2) & 0xff;
   case ARM::fixup_arm_thumb_cb: {
-    // CB instructions can only branch to offsets in [0, 126] in multiples of 2
-    if (Ctx && ((int64_t)Value < 0 || Value > 0x3e || Value & 1)) {
+    // CB instructions can only branch to offsets in [4, 126] in multiples of 2
+    // so ensure that the raw value LSB is zero and it lies in [2, 130].
+    // An offset of 2 will be relaxed to a NOP.
+    if (Ctx && ((int64_t)Value < 2 || Value > 0x82 || Value & 1)) {
       Ctx->reportError(Fixup.getLoc(), "out of range pc-relative fixup value");
       return 0;
     }
Index: llvm/trunk/test/MC/ARM/thumb-cb-negative-offsets.s
===================================================================
--- llvm/trunk/test/MC/ARM/thumb-cb-negative-offsets.s
+++ llvm/trunk/test/MC/ARM/thumb-cb-negative-offsets.s
@@ -16,4 +16,16 @@
 
   .space 1000
 label1:
-  .word 4
+  nop
+
+@ CHECK: out of range pc-relative fixup value
+  cbz r0, label2
+  .space 130
+label2:
+  nop
+
+@ CHECK-NOT: label3
+  cbnz r0, label3
+  .space 128
+label3:
+  nop