[WebAssembly] Cleanup trailing whitespace

[ddcc]

Summary

Test for commit access.

[dschuff]

\o/

llvm/trunk/lib/Target/WebAssembly/WebAssemblyRegStackify.cpp

if (TargetRegisterInfo::isPhysicalRegister(Reg)) {
       if (!MRI.isPhysRegModified(Reg))
         continue;
       // Otherwise, it's a physical register with unknown liveness.
       return false;
     }
 
     // Ask LiveIntervals whether moving this virtual register use or def to
     // Insert will change which value numbers are seen.
-    // 
+    //
     // If the operand is a use of a register that is also defined in the same
     // instruction, test that the newly defined value reaches the insert point,
     // since the operand will be moving along with the def.
     const LiveInterval &LI = LIS.getInterval(Reg);
     VNInfo *DefVNI =
         (MO.isDef() || Def->definesRegister(Reg)) ?
         LI.getVNInfoAt(LIS.getInstructionIndex(*Def).getRegSlot()) :
         LI.getVNInfoBefore(LIS.getInstructionIndex(*Def));
for (const MachineOperand &Use : MRI.use_operands(Reg)) {
     } else {
       // Test that the use is dominated by the one selected use.
       while (!MDT.dominates(OneUseInst, UseInst)) {
         // Actually, dominating is over-conservative. Test that the use would
         // happen after the one selected use in the stack evaluation order.
         //
         // This is needed as a consequence of using implicit get_locals for
         // uses and implicit set_locals for defs.
-        if (UseInst->getDesc().getNumDefs() == 0) 
+        if (UseInst->getDesc().getNumDefs() == 0)
           return false;
         const MachineOperand &MO = UseInst->getOperand(0);
         if (!MO.isReg())
           return false;
         unsigned DefReg = MO.getReg();
         if (!TargetRegisterInfo::isVirtualRegister(DefReg) ||
             !MFI.isVRegStackified(DefReg))
           return false;