Index: lib/Target/AMDGPU/SILowerControlFlow.cpp =================================================================== --- lib/Target/AMDGPU/SILowerControlFlow.cpp +++ lib/Target/AMDGPU/SILowerControlFlow.cpp @@ -419,10 +419,7 @@ TRI = &TII->getRegisterInfo(); SkipThreshold = SkipThresholdFlag; - SIMachineFunctionInfo *MFI = MF.getInfo(); - bool HaveKill = false; - bool NeedFlat = false; unsigned Depth = 0; MachineFunction::iterator NextBB; @@ -440,10 +437,6 @@ MachineInstr &MI = *I; - // Flat uses m0 in case it needs to access LDS. - if (TII->isFLAT(MI)) - NeedFlat = true; - switch (MI.getOpcode()) { default: break; case AMDGPU::SI_IF: @@ -519,13 +512,5 @@ } } } - - if (NeedFlat && MFI->isKernel()) { - // TODO: What to use with function calls? - // We will need to Initialize the flat scratch register pair. - if (NeedFlat) - MFI->setHasFlatInstructions(true); - } - return true; } Index: lib/Target/AMDGPU/SIMachineFunctionInfo.h =================================================================== --- lib/Target/AMDGPU/SIMachineFunctionInfo.h +++ lib/Target/AMDGPU/SIMachineFunctionInfo.h @@ -82,7 +82,6 @@ bool HasSpilledSGPRs; bool HasSpilledVGPRs; bool HasNonSpillStackObjects; - bool HasFlatInstructions; unsigned NumSpilledSGPRs; unsigned NumSpilledVGPRs; @@ -308,14 +307,6 @@ HasNonSpillStackObjects = StackObject; } - bool hasFlatInstructions() const { - return HasFlatInstructions; - } - - void setHasFlatInstructions(bool UseFlat = true) { - HasFlatInstructions = UseFlat; - } - unsigned getNumSpilledSGPRs() const { return NumSpilledSGPRs; } Index: lib/Target/AMDGPU/SIMachineFunctionInfo.cpp =================================================================== --- lib/Target/AMDGPU/SIMachineFunctionInfo.cpp +++ lib/Target/AMDGPU/SIMachineFunctionInfo.cpp @@ -59,7 +59,6 @@ HasSpilledSGPRs(false), HasSpilledVGPRs(false), HasNonSpillStackObjects(false), - HasFlatInstructions(false), NumSpilledSGPRs(0), NumSpilledVGPRs(0), PrivateSegmentBuffer(false),