Index: lib/CodeGen/BranchRelaxation.cpp =================================================================== --- lib/CodeGen/BranchRelaxation.cpp +++ lib/CodeGen/BranchRelaxation.cpp @@ -445,8 +445,24 @@ if (MI.isConditionalBranch()) { if (MachineBasicBlock *DestBB = TII->getBranchDestBlock(MI)) { if (!isBlockInRange(MI, *DestBB)) { - fixupConditionalBranch(MI); - ++NumConditionalRelaxed; + if (Next != MBB.end() && Next->isConditionalBranch()) { + // If there are multiple conditional branches, this isn't an + // analyzable block. Split later terminators into a new block so + // each one will be analyzable. + + MachineBasicBlock *NewBB = splitBlockBeforeInstr(*Next); + NewBB->transferSuccessors(&MBB); + MBB.addSuccessor(NewBB); + MBB.addSuccessor(DestBB); + + // Cleanup potential unconditional branch to successor block. + NewBB->updateTerminator(); + MBB.updateTerminator(); + } else { + fixupConditionalBranch(MI); + ++NumConditionalRelaxed; + } + Changed = true; // This may have modified all of the terminators, so start over. Index: test/CodeGen/AArch64/branch-relax-bcc.ll =================================================================== --- test/CodeGen/AArch64/branch-relax-bcc.ll +++ test/CodeGen/AArch64/branch-relax-bcc.ll @@ -1,16 +1,22 @@ ; RUN: llc -mtriple=aarch64-apple-darwin -aarch64-bcc-offset-bits=3 < %s | FileCheck %s ; CHECK-LABEL: invert_bcc: -; CHECK: fcmp s0, s1 -; CHECK-NEXT: b.ne [[BB1:LBB[0-9]+_[0-9]+]] -; CHECK-NEXT: b.vs [[BB2:LBB[0-9]+_[0-9]+]] -; CHECK-NEXT: b [[BB2]] +; CHECK: fcmp s0, s1 +; CHECK-NEXT: b.eq [[JUMP_BB1:LBB[0-9]+_[0-9]+]] +; CHECK-NEXT: b [[JUMP_BB2:LBB[0-9]+_[0-9]+]] -; CHECK: [[BB1]]: +; CHECK-NEXT: [[JUMP_BB1]]: +; CHECK-NEXT: b [[BB1:LBB[0-9]+_[0-9]+]] + +; CHECK-NEXT: [[JUMP_BB2]]: +; CHECK-NEXT: b.vc [[BB2:LBB[0-9]+_[0-9]+]] +; CHECK-NEXT: b [[BB1]] + +; CHECK: [[BB2]]: ; %bb2 ; CHECK: mov w{{[0-9]+}}, #9 ; CHECK: ret -; CHECK: [[BB2]]: +; CHECK: [[BB1]]: ; %bb1 ; CHECK: mov w{{[0-9]+}}, #42 ; CHECK: ret