Index: lib/CodeGen/BranchFolding.cpp
===================================================================
--- lib/CodeGen/BranchFolding.cpp
+++ lib/CodeGen/BranchFolding.cpp
@@ -996,6 +996,24 @@
     MachineBasicBlock *IBB = &*I;
     MachineBasicBlock *PredBB = &*std::prev(I);
     MergePotentials.clear();
+    MachineLoop *ML;
+
+    // Bail out if IBB is the loop header after the block placement because
+    // -- If merging predecessors that belong to the same loop as IBB, the
+    // common tail of merged predecessors may become the loop top if block
+    // placement is called again and the predecessors may branch to this common
+    // tail and require more branches. This can be relaxed if
+    // MachineBlockPlacement::findBestLoopTop is more flexable.
+    // --If merging predecessors that do not belong to the same loop as IBB, the
+    // loop info of IBB's loop and the other loops may be affected. Calling the
+    // block placement again may make big change to the layout and eliminate the
+    // reasone to do tail merging here.
+    if (AfterBlockPlacement && MLI) {
+      ML = MLI->getLoopFor(IBB);
+      if (ML && IBB == ML->getHeader())
+        continue;
+    }
+
     for (MachineBasicBlock *PBB : I->predecessors()) {
       if (MergePotentials.size() == TailMergeThreshold)
         break;
@@ -1015,16 +1033,12 @@
       if (PBB->hasEHPadSuccessor())
         continue;
 
-      // Bail out if the loop header (IBB) is not the top of the loop chain
-      // after the block placement.  Otherwise, the common tail of IBB's
-      // predecessors may become the loop top if block placement is called again
-      // and the predecessors may branch to this common tail.
-      // FIXME: Relaxed this check if the algorithm of finding loop top is
-      // changed in MBP.
+      // After block placement, only consider predecessors that belong to the
+      // same loop as IBB.  The reason is the same as above when skipping loop
+      // header.
       if (AfterBlockPlacement && MLI)
-        if (MachineLoop *ML = MLI->getLoopFor(IBB))
-          if (IBB == ML->getHeader() && ML == MLI->getLoopFor(PBB))
-            continue;
+        if (ML != MLI->getLoopFor(PBB))
+          continue;
 
       MachineBasicBlock *TBB = nullptr, *FBB = nullptr;
       SmallVector<MachineOperand, 4> Cond;
Index: test/CodeGen/ARM/arm-and-tst-peephole.ll
===================================================================
--- test/CodeGen/ARM/arm-and-tst-peephole.ll
+++ test/CodeGen/ARM/arm-and-tst-peephole.ll
@@ -49,7 +49,7 @@
 ; V8-NEXT: beq
 ; V8-NEXT: %tailrecurse.switch
 ; V8: cmp
-; V8-NEXT: beq
+; V8-NEXT: bne
 ; V8-NEXT: b	
 ; The trailing space in the last line checks that the branch is unconditional
   switch i32 %and, label %sw.epilog [
Index: test/CodeGen/X86/tail-merge-after-mbp.ll
===================================================================
--- /dev/null
+++ test/CodeGen/X86/tail-merge-after-mbp.ll
@@ -0,0 +1,91 @@
+; RUN: llc  -o - %s | FileCheck %s
+
+%0 = type { %1, %3* }
+%1 = type { %2* }
+%2 = type { %2*, i8* }
+%3 = type { i32, i32 (i32, i32)* }
+
+
+declare i32 @Up(...) local_unnamed_addr
+
+; check loop block LBB0_8 is not merged with BB#6
+; check loop block BB#9 is not merged with BB#5, BB#7
+define i32 @foo(%0* nocapture readonly, i32) local_unnamed_addr {
+; CHECK-LABEL: foo:
+; CHECK:# BB#5:
+; CHECK-NEXT:        movq    (%rax), %rax
+; CHECK-NEXT:        testq   %rax, %rax
+; CHECK-NEXT:        je      .LBB0_12 
+; CHECK-NEXT:# BB#6:
+; CHECK-NEXT:        cmpq    $0, 8(%rax)
+; CHECK-NEXT:        jne     .LBB0_11
+; CHECK-NEXT:# BB#7:
+; CHECK-NEXT:        movq    (%rax), %rax
+; CHECK-NEXT:        testq   %rax, %rax
+; CHECK-NEXT:        je      .LBB0_12
+; CHECK-NEXT:.LBB0_8:
+; CHECK-NEXT:        cmpq    $0, 8(%rax)
+; CHECK-NEXT:        jne     .LBB0_11
+; CHECK-NEXT:# BB#9:
+; CHECK-NEXT:        movq    (%rax), %rax
+; CHECK-NEXT:        testq   %rax, %rax
+; CHECK-NEXT:        jne     .LBB0_8
+  br i1 undef, label %34, label %3
+
+; <label>:3:                                      ; preds = %2
+  br i1 undef, label %7, label %4
+
+; <label>:4:                                      ; preds = %3
+  %5 = tail call i32 undef(i32 undef, i32 undef)
+  %6 = icmp eq i32 %5, 0
+  br i1 %6, label %7, label %34
+
+; <label>:7:                                      ; preds = %4, %3
+  %8 = icmp eq %2* null, null
+  br i1 %8, label %34, label %9
+
+; <label>:9:                                      ; preds = %7
+  %10 = icmp eq i8* undef, null
+  br i1 %10, label %11, label %32
+
+; <label>:11:                                     ; preds = %9
+  %12 = load %2*, %2** undef, align 8
+  %13 = icmp eq %2* %12, null
+  br i1 %13, label %34, label %14
+
+; <label>:14:                                     ; preds = %11
+  %15 = getelementptr inbounds %2, %2* %12, i64 0, i32 1
+  %16 = load i8*, i8** %15, align 8
+  %17 = icmp eq i8* %16, null
+  br i1 %17, label %18, label %32
+
+; <label>:18:                                     ; preds = %14
+  %19 = load %2*, %2** undef, align 8
+  %20 = icmp eq %2* %19, null
+  br i1 %20, label %34, label %21
+
+; <label>:21:                                     ; preds = %18
+  %22 = getelementptr inbounds %2, %2* %19, i64 0, i32 1
+  %23 = load i8*, i8** %22, align 8
+  %24 = icmp eq i8* %23, null
+  br i1 %24, label %25, label %32
+
+; <label>:25:                                     ; preds = %28, %21
+  %26 = load %2*, %2** undef, align 8
+  %27 = icmp eq %2* %26, null
+  br i1 %27, label %34, label %28
+
+; <label>:28:                                     ; preds = %25
+  %29 = getelementptr inbounds %2, %2* %26, i64 0, i32 1
+  %30 = load i8*, i8** %29, align 8
+  %31 = icmp eq i8* %30, null
+  br i1 %31, label %25, label %32
+
+; <label>:32:                                     ; preds = %28, %21, %14, %9
+  %33 = tail call i32 (...) @Up()
+  br label %34
+
+; <label>:34:                                     ; preds = %32, %25, %18, %11, %7, %4, %2
+  %35 = phi i32 [ 0, %2 ], [ %5, %4 ], [ 0, %7 ], [ 0, %11 ], [ 0, %32 ], [ 0, %18 ], [ 0, %25 ]
+  ret i32 %35
+}