Index: llvm/trunk/include/llvm/Target/TargetInstrInfo.h
===================================================================
--- llvm/trunk/include/llvm/Target/TargetInstrInfo.h
+++ llvm/trunk/include/llvm/Target/TargetInstrInfo.h
@@ -250,6 +250,12 @@
                                  unsigned &Size, unsigned &Offset,
                                  const MachineFunction &MF) const;
 
+  /// Returns the size in bytes of the specified MachineInstr, or ~0U
+  /// when this function is not implemented by a target.
+  virtual unsigned getInstSizeInBytes(const MachineInstr &MI) const {
+    return ~0U;
+  }
+
   /// Return true if the instruction is as cheap as a move instruction.
   ///
   /// Targets for different archs need to override this, and different
Index: llvm/trunk/lib/Target/AArch64/AArch64InstrInfo.h
===================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64InstrInfo.h
+++ llvm/trunk/lib/Target/AArch64/AArch64InstrInfo.h
@@ -39,7 +39,7 @@
   /// always be able to get register info as well (through this method).
   const AArch64RegisterInfo &getRegisterInfo() const { return RI; }
 
-  unsigned getInstSizeInBytes(const MachineInstr &MI) const;
+  unsigned getInstSizeInBytes(const MachineInstr &MI) const override;
 
   bool isAsCheapAsAMove(const MachineInstr &MI) const override;
 
Index: llvm/trunk/lib/Target/AMDGPU/SIInstrInfo.h
===================================================================
--- llvm/trunk/lib/Target/AMDGPU/SIInstrInfo.h
+++ llvm/trunk/lib/Target/AMDGPU/SIInstrInfo.h
@@ -527,7 +527,7 @@
     return get(pseudoToMCOpcode(Opcode));
   }
 
-  unsigned getInstSizeInBytes(const MachineInstr &MI) const;
+  unsigned getInstSizeInBytes(const MachineInstr &MI) const override;
 
   ArrayRef<std::pair<int, const char *>>
   getSerializableTargetIndices() const override;
Index: llvm/trunk/lib/Target/AVR/AVRInstrInfo.h
===================================================================
--- llvm/trunk/lib/Target/AVR/AVRInstrInfo.h
+++ llvm/trunk/lib/Target/AVR/AVRInstrInfo.h
@@ -70,7 +70,7 @@
   const MCInstrDesc &getBrCond(AVRCC::CondCodes CC) const;
   AVRCC::CondCodes getCondFromBranchOpc(unsigned Opc) const;
   AVRCC::CondCodes getOppositeCondition(AVRCC::CondCodes CC) const;
-  unsigned getInstSizeInBytes(const MachineInstr *MI) const;
+  unsigned getInstSizeInBytes(const MachineInstr *MI) const override;
 
   void copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,
                    const DebugLoc &DL, unsigned DestReg, unsigned SrcReg,
Index: llvm/trunk/lib/Target/MSP430/MSP430InstrInfo.h
===================================================================
--- llvm/trunk/lib/Target/MSP430/MSP430InstrInfo.h
+++ llvm/trunk/lib/Target/MSP430/MSP430InstrInfo.h
@@ -68,7 +68,7 @@
                             const TargetRegisterClass *RC,
                             const TargetRegisterInfo *TRI) const override;
 
-  unsigned getInstSizeInBytes(const MachineInstr &MI) const;
+  unsigned getInstSizeInBytes(const MachineInstr &MI) const override;
 
   // Branch folding goodness
   bool
Index: llvm/trunk/lib/Target/Mips/MipsInstrInfo.h
===================================================================
--- llvm/trunk/lib/Target/Mips/MipsInstrInfo.h
+++ llvm/trunk/lib/Target/Mips/MipsInstrInfo.h
@@ -92,7 +92,7 @@
   virtual unsigned getOppositeBranchOpc(unsigned Opc) const = 0;
 
   /// Return the number of bytes of code the specified instruction may be.
-  unsigned getInstSizeInBytes(const MachineInstr &MI) const;
+  unsigned getInstSizeInBytes(const MachineInstr &MI) const override;
 
   void storeRegToStackSlot(MachineBasicBlock &MBB,
                            MachineBasicBlock::iterator MBBI,
Index: llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.h
===================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.h
+++ llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.h
@@ -256,7 +256,7 @@
   /// GetInstSize - Return the number of bytes of code the specified
   /// instruction may be.  This returns the maximum number of bytes.
   ///
-  unsigned getInstSizeInBytes(const MachineInstr &MI) const;
+  unsigned getInstSizeInBytes(const MachineInstr &MI) const override;
 
   void getNoopForMachoTarget(MCInst &NopInst) const override;
 
Index: llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.h
===================================================================
--- llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.h
+++ llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.h
@@ -219,7 +219,7 @@
   const SystemZRegisterInfo &getRegisterInfo() const { return RI; }
 
   // Return the size in bytes of MI.
-  uint64_t getInstSizeInBytes(const MachineInstr &MI) const;
+  unsigned getInstSizeInBytes(const MachineInstr &MI) const override;
 
   // Return true if MI is a conditional or unconditional branch.
   // When returning true, set Cond to the mask of condition-code
Index: llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.cpp
===================================================================
--- llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.cpp
+++ llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.cpp
@@ -1194,7 +1194,7 @@
   }
 }
 
-uint64_t SystemZInstrInfo::getInstSizeInBytes(const MachineInstr &MI) const {
+unsigned SystemZInstrInfo::getInstSizeInBytes(const MachineInstr &MI) const {
   if (MI.getOpcode() == TargetOpcode::INLINEASM) {
     const MachineFunction *MF = MI.getParent()->getParent();
     const char *AsmStr = MI.getOperand(0).getSymbolName();