Index: lib/Target/AArch64/AArch64.h =================================================================== --- lib/Target/AArch64/AArch64.h +++ lib/Target/AArch64/AArch64.h @@ -46,8 +46,21 @@ FunctionPass *createAArch64CollectLOHPass(); +void initializeAArch64A53Fix835769Pass(PassRegistry&); +void initializeAArch64A57FPLoadBalancingPass(PassRegistry&); +void initializeAArch64AddressTypePromotionPass(PassRegistry&); +void initializeAArch64AdvSIMDScalarPass(PassRegistry&); +void initializeAArch64BranchRelaxationPass(PassRegistry&); +void initializeAArch64CollectLOHPass(PassRegistry&); +void initializeAArch64ConditionalComparesPass(PassRegistry&); +void initializeAArch64ConditionOptimizerPass(PassRegistry&); +void initializeAArch64DeadRegisterDefinitionsPass(PassRegistry&); void initializeAArch64ExpandPseudoPass(PassRegistry&); void initializeAArch64LoadStoreOptPass(PassRegistry&); +void initializeAArch64PromoteConstantPass(PassRegistry&); +void initializeAArch64RedundantCopyEliminationPass(PassRegistry&); +void initializeAArch64StorePairSuppressPass(PassRegistry&); +void initializeLDTLSCleanupPass(PassRegistry&); } // end namespace llvm #endif Index: lib/Target/AArch64/AArch64A53Fix835769.cpp =================================================================== --- lib/Target/AArch64/AArch64A53Fix835769.cpp +++ lib/Target/AArch64/AArch64A53Fix835769.cpp @@ -82,7 +82,9 @@ public: static char ID; - explicit AArch64A53Fix835769() : MachineFunctionPass(ID) {} + explicit AArch64A53Fix835769() : MachineFunctionPass(ID) { + initializeAArch64A53Fix835769Pass(*PassRegistry::getPassRegistry()); + } bool runOnMachineFunction(MachineFunction &F) override; @@ -107,6 +109,9 @@ } // end anonymous namespace +INITIALIZE_PASS(AArch64A53Fix835769, "aarch64-a53-fix-835769", + "AArch64 fix for A53 erratum 835769", false, false) + //===----------------------------------------------------------------------===// bool Index: lib/Target/AArch64/AArch64A57FPLoadBalancing.cpp =================================================================== --- lib/Target/AArch64/AArch64A57FPLoadBalancing.cpp +++ lib/Target/AArch64/AArch64A57FPLoadBalancing.cpp @@ -95,10 +95,6 @@ } } -namespace llvm { -static void initializeAArch64A57FPLoadBalancingPass(PassRegistry &); -} - //===----------------------------------------------------------------------===// namespace { Index: lib/Target/AArch64/AArch64AddressTypePromotion.cpp =================================================================== --- lib/Target/AArch64/AArch64AddressTypePromotion.cpp +++ lib/Target/AArch64/AArch64AddressTypePromotion.cpp @@ -47,7 +47,7 @@ #define DEBUG_TYPE "aarch64-type-promotion" static cl::opt -EnableAddressTypePromotion("aarch64-type-promotion", cl::Hidden, +EnableAddressTypePromotion("aarch64-enable-type-promotion", cl::Hidden, cl::desc("Enable the type promotion pass"), cl::init(true)); static cl::opt @@ -62,10 +62,6 @@ // AArch64AddressTypePromotion //===----------------------------------------------------------------------===// -namespace llvm { -void initializeAArch64AddressTypePromotionPass(PassRegistry &); -} - namespace { class AArch64AddressTypePromotion : public FunctionPass { Index: lib/Target/AArch64/AArch64AdvSIMDScalarPass.cpp =================================================================== --- lib/Target/AArch64/AArch64AdvSIMDScalarPass.cpp +++ lib/Target/AArch64/AArch64AdvSIMDScalarPass.cpp @@ -61,10 +61,6 @@ STATISTIC(NumCopiesDeleted, "Number of cross-class copies deleted"); STATISTIC(NumCopiesInserted, "Number of cross-class copies inserted"); -namespace llvm { -void initializeAArch64AdvSIMDScalarPass(PassRegistry &); -} - #define AARCH64_ADVSIMD_NAME "AdvSIMD Scalar Operation Optimization" namespace { Index: lib/Target/AArch64/AArch64BranchRelaxation.cpp =================================================================== --- lib/Target/AArch64/AArch64BranchRelaxation.cpp +++ lib/Target/AArch64/AArch64BranchRelaxation.cpp @@ -27,7 +27,7 @@ #define DEBUG_TYPE "aarch64-branch-relax" static cl::opt -BranchRelaxation("aarch64-branch-relax", cl::Hidden, cl::init(true), +BranchRelaxation("aarch64-enable-branch-relax", cl::Hidden, cl::init(true), cl::desc("Relax out of range conditional branches")); static cl::opt Index: lib/Target/AArch64/AArch64CleanupLocalDynamicTLSPass.cpp =================================================================== --- lib/Target/AArch64/AArch64CleanupLocalDynamicTLSPass.cpp +++ lib/Target/AArch64/AArch64CleanupLocalDynamicTLSPass.cpp @@ -33,10 +33,14 @@ #include "llvm/CodeGen/MachineRegisterInfo.h" using namespace llvm; +#define TLSCLEANUP_PASS_NAME "AArch64 Local Dynamic TLS Access Clean-up" + namespace { struct LDTLSCleanup : public MachineFunctionPass { static char ID; - LDTLSCleanup() : MachineFunctionPass(ID) {} + LDTLSCleanup() : MachineFunctionPass(ID) { + initializeLDTLSCleanupPass(*PassRegistry::getPassRegistry()); + } bool runOnMachineFunction(MachineFunction &MF) override { if (skipFunction(*MF.getFunction())) @@ -128,9 +132,7 @@ return Copy; } - const char *getPassName() const override { - return "Local Dynamic TLS Access Clean-up"; - } + const char *getPassName() const override { return TLSCLEANUP_PASS_NAME; } void getAnalysisUsage(AnalysisUsage &AU) const override { AU.setPreservesCFG(); @@ -140,6 +142,9 @@ }; } +INITIALIZE_PASS(LDTLSCleanup, "aarch64-local-dynamic-tls-cleanup", + TLSCLEANUP_PASS_NAME, false, false) + char LDTLSCleanup::ID = 0; FunctionPass *llvm::createAArch64CleanupLocalDynamicTLSPass() { return new LDTLSCleanup(); Index: lib/Target/AArch64/AArch64CollectLOH.cpp =================================================================== --- lib/Target/AArch64/AArch64CollectLOH.cpp +++ lib/Target/AArch64/AArch64CollectLOH.cpp @@ -164,10 +164,6 @@ STATISTIC(NumADRSimpleCandidate, "Number of simplifiable ADRP + ADD"); STATISTIC(NumADRComplexCandidate, "Number of too complex ADRP + ADD"); -namespace llvm { -void initializeAArch64CollectLOHPass(PassRegistry &); -} - #define AARCH64_COLLECT_LOH_NAME "AArch64 Collect Linker Optimization Hint (LOH)" namespace { Index: lib/Target/AArch64/AArch64ConditionOptimizer.cpp =================================================================== --- lib/Target/AArch64/AArch64ConditionOptimizer.cpp +++ lib/Target/AArch64/AArch64ConditionOptimizer.cpp @@ -95,7 +95,9 @@ typedef std::tuple CmpInfo; static char ID; - AArch64ConditionOptimizer() : MachineFunctionPass(ID) {} + AArch64ConditionOptimizer() : MachineFunctionPass(ID) { + initializeAArch64ConditionOptimizerPass(*PassRegistry::getPassRegistry()); + } void getAnalysisUsage(AnalysisUsage &AU) const override; MachineInstr *findSuitableCompare(MachineBasicBlock *MBB); CmpInfo adjustCmp(MachineInstr *CmpMI, AArch64CC::CondCode Cmp); @@ -111,10 +113,6 @@ char AArch64ConditionOptimizer::ID = 0; -namespace llvm { -void initializeAArch64ConditionOptimizerPass(PassRegistry &); -} - INITIALIZE_PASS_BEGIN(AArch64ConditionOptimizer, "aarch64-condopt", "AArch64 CondOpt Pass", false, false) INITIALIZE_PASS_DEPENDENCY(MachineDominatorTree) Index: lib/Target/AArch64/AArch64ConditionalCompares.cpp =================================================================== --- lib/Target/AArch64/AArch64ConditionalCompares.cpp +++ lib/Target/AArch64/AArch64ConditionalCompares.cpp @@ -732,7 +732,9 @@ public: static char ID; - AArch64ConditionalCompares() : MachineFunctionPass(ID) {} + AArch64ConditionalCompares() : MachineFunctionPass(ID) { + initializeAArch64ConditionalComparesPass(*PassRegistry::getPassRegistry()); + } void getAnalysisUsage(AnalysisUsage &AU) const override; bool runOnMachineFunction(MachineFunction &MF) override; const char *getPassName() const override { @@ -750,10 +752,6 @@ char AArch64ConditionalCompares::ID = 0; -namespace llvm { -void initializeAArch64ConditionalComparesPass(PassRegistry &); -} - INITIALIZE_PASS_BEGIN(AArch64ConditionalCompares, "aarch64-ccmp", "AArch64 CCMP Pass", false, false) INITIALIZE_PASS_DEPENDENCY(MachineDominatorTree) Index: lib/Target/AArch64/AArch64DeadRegisterDefinitionsPass.cpp =================================================================== --- lib/Target/AArch64/AArch64DeadRegisterDefinitionsPass.cpp +++ lib/Target/AArch64/AArch64DeadRegisterDefinitionsPass.cpp @@ -26,10 +26,6 @@ STATISTIC(NumDeadDefsReplaced, "Number of dead definitions replaced"); -namespace llvm { -void initializeAArch64DeadRegisterDefinitionsPass(PassRegistry &); -} - #define AARCH64_DEAD_REG_DEF_NAME "AArch64 Dead register definitions" namespace { Index: lib/Target/AArch64/AArch64PromoteConstant.cpp =================================================================== --- lib/Target/AArch64/AArch64PromoteConstant.cpp +++ lib/Target/AArch64/AArch64PromoteConstant.cpp @@ -101,7 +101,9 @@ }; static char ID; - AArch64PromoteConstant() : ModulePass(ID) {} + AArch64PromoteConstant() : ModulePass(ID) { + initializeAArch64PromoteConstantPass(*PassRegistry::getPassRegistry()); + } const char *getPassName() const override { return "AArch64 Promote Constant"; } @@ -214,10 +216,6 @@ char AArch64PromoteConstant::ID = 0; -namespace llvm { -void initializeAArch64PromoteConstantPass(PassRegistry &); -} - INITIALIZE_PASS_BEGIN(AArch64PromoteConstant, "aarch64-promote-const", "AArch64 Promote Constant Pass", false, false) INITIALIZE_PASS_DEPENDENCY(DominatorTreeWrapperPass) Index: lib/Target/AArch64/AArch64RedundantCopyElimination.cpp =================================================================== --- lib/Target/AArch64/AArch64RedundantCopyElimination.cpp +++ lib/Target/AArch64/AArch64RedundantCopyElimination.cpp @@ -39,10 +39,6 @@ STATISTIC(NumCopiesRemoved, "Number of copies removed."); -namespace llvm { -void initializeAArch64RedundantCopyEliminationPass(PassRegistry &); -} - namespace { class AArch64RedundantCopyElimination : public MachineFunctionPass { const MachineRegisterInfo *MRI; @@ -50,7 +46,10 @@ public: static char ID; - AArch64RedundantCopyElimination() : MachineFunctionPass(ID) {} + AArch64RedundantCopyElimination() : MachineFunctionPass(ID) { + initializeAArch64RedundantCopyEliminationPass( + *PassRegistry::getPassRegistry()); + } bool optimizeCopy(MachineBasicBlock *MBB); bool runOnMachineFunction(MachineFunction &MF) override; MachineFunctionProperties getRequiredProperties() const override { Index: lib/Target/AArch64/AArch64StorePairSuppress.cpp =================================================================== --- lib/Target/AArch64/AArch64StorePairSuppress.cpp +++ lib/Target/AArch64/AArch64StorePairSuppress.cpp @@ -25,6 +25,8 @@ #define DEBUG_TYPE "aarch64-stp-suppress" +#define STPSUPPRESS_PASS_NAME "AArch64 Store Pair Suppression" + namespace { class AArch64StorePairSuppress : public MachineFunctionPass { const AArch64InstrInfo *TII; @@ -36,12 +38,12 @@ public: static char ID; - AArch64StorePairSuppress() : MachineFunctionPass(ID) {} - - const char *getPassName() const override { - return "AArch64 Store Pair Suppression"; + AArch64StorePairSuppress() : MachineFunctionPass(ID) { + initializeAArch64StorePairSuppressPass(*PassRegistry::getPassRegistry()); } + const char *getPassName() const override { return STPSUPPRESS_PASS_NAME; } + bool runOnMachineFunction(MachineFunction &F) override; private: @@ -59,6 +61,9 @@ char AArch64StorePairSuppress::ID = 0; } // anonymous +INITIALIZE_PASS(AArch64StorePairSuppress, "aarch64-store-pair-suppress", + STPSUPPRESS_PASS_NAME, false, false) + FunctionPass *llvm::createAArch64StorePairSuppressPass() { return new AArch64StorePairSuppress(); } Index: lib/Target/AArch64/AArch64TargetMachine.cpp =================================================================== --- lib/Target/AArch64/AArch64TargetMachine.cpp +++ lib/Target/AArch64/AArch64TargetMachine.cpp @@ -33,7 +33,7 @@ using namespace llvm; static cl::opt -EnableCCMP("aarch64-ccmp", cl::desc("Enable the CCMP formation pass"), +EnableCCMP("aarch64-enable-ccmp", cl::desc("Enable the CCMP formation pass"), cl::init(true), cl::Hidden); static cl::opt EnableMCR("aarch64-mcr", @@ -45,17 +45,19 @@ cl::init(true), cl::Hidden); static cl::opt -EnableAdvSIMDScalar("aarch64-simd-scalar", cl::desc("Enable use of AdvSIMD scalar" - " integer instructions"), cl::init(false), cl::Hidden); +EnableAdvSIMDScalar("aarch64-enable-simd-scalar", + cl::desc("Enable use of AdvSIMD scalar integer instructions"), + cl::init(false), cl::Hidden); static cl::opt -EnablePromoteConstant("aarch64-promote-const", cl::desc("Enable the promote " - "constant pass"), cl::init(true), cl::Hidden); +EnablePromoteConstant("aarch64-enable-promote-const", + cl::desc("Enable the promote constant pass"), + cl::init(true), cl::Hidden); static cl::opt -EnableCollectLOH("aarch64-collect-loh", cl::desc("Enable the pass that emits the" - " linker optimization hints (LOH)"), cl::init(true), - cl::Hidden); +EnableCollectLOH("aarch64-enable-collect-loh", + cl::desc("Enable the pass that emits the linker optimization" + "hints (LOH)"), cl::init(true), cl::Hidden); static cl::opt EnableDeadRegisterElimination("aarch64-dead-def-elimination", cl::Hidden, @@ -86,7 +88,7 @@ cl::init(true)); static cl::opt -EnableCondOpt("aarch64-condopt", +EnableCondOpt("aarch64-enable-condopt", cl::desc("Enable the condition optimizer pass"), cl::init(true), cl::Hidden); @@ -117,8 +119,21 @@ RegisterTargetMachine Z(TheARM64Target); auto PR = PassRegistry::getPassRegistry(); initializeGlobalISel(*PR); + initializeAArch64A53Fix835769Pass(*PR); + initializeAArch64A57FPLoadBalancingPass(*PR); + initializeAArch64AddressTypePromotionPass(*PR); + initializeAArch64AdvSIMDScalarPass(*PR); + initializeAArch64BranchRelaxationPass(*PR); + initializeAArch64CollectLOHPass(*PR); + initializeAArch64ConditionalComparesPass(*PR); + initializeAArch64ConditionOptimizerPass(*PR); + initializeAArch64DeadRegisterDefinitionsPass(*PR); initializeAArch64ExpandPseudoPass(*PR); initializeAArch64LoadStoreOptPass(*PR); + initializeAArch64PromoteConstantPass(*PR); + initializeAArch64RedundantCopyEliminationPass(*PR); + initializeAArch64StorePairSuppressPass(*PR); + initializeLDTLSCleanupPass(*PR); } //===----------------------------------------------------------------------===// Index: test/CodeGen/AArch64/arm64-AdvSIMD-Scalar.ll =================================================================== --- test/CodeGen/AArch64/arm64-AdvSIMD-Scalar.ll +++ test/CodeGen/AArch64/arm64-AdvSIMD-Scalar.ll @@ -1,7 +1,7 @@ -; RUN: llc < %s -verify-machineinstrs -mtriple=arm64-eabi -aarch64-neon-syntax=apple -aarch64-simd-scalar=true -asm-verbose=false -disable-adv-copy-opt=true | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-NOOPT -; RUN: llc < %s -verify-machineinstrs -mtriple=arm64-eabi -aarch64-neon-syntax=apple -aarch64-simd-scalar=true -asm-verbose=false -disable-adv-copy-opt=false | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-OPT -; RUN: llc < %s -verify-machineinstrs -mtriple=arm64-eabi -aarch64-neon-syntax=generic -aarch64-simd-scalar=true -asm-verbose=false -disable-adv-copy-opt=true | FileCheck %s -check-prefix=GENERIC -check-prefix=GENERIC-NOOPT -; RUN: llc < %s -verify-machineinstrs -mtriple=arm64-eabi -aarch64-neon-syntax=generic -aarch64-simd-scalar=true -asm-verbose=false -disable-adv-copy-opt=false | FileCheck %s -check-prefix=GENERIC -check-prefix=GENERIC-OPT +; RUN: llc < %s -verify-machineinstrs -mtriple=arm64-eabi -aarch64-neon-syntax=apple -aarch64-enable-simd-scalar=true -asm-verbose=false -disable-adv-copy-opt=true | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-NOOPT +; RUN: llc < %s -verify-machineinstrs -mtriple=arm64-eabi -aarch64-neon-syntax=apple -aarch64-enable-simd-scalar=true -asm-verbose=false -disable-adv-copy-opt=false | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-OPT +; RUN: llc < %s -verify-machineinstrs -mtriple=arm64-eabi -aarch64-neon-syntax=generic -aarch64-enable-simd-scalar=true -asm-verbose=false -disable-adv-copy-opt=true | FileCheck %s -check-prefix=GENERIC -check-prefix=GENERIC-NOOPT +; RUN: llc < %s -verify-machineinstrs -mtriple=arm64-eabi -aarch64-neon-syntax=generic -aarch64-enable-simd-scalar=true -asm-verbose=false -disable-adv-copy-opt=false | FileCheck %s -check-prefix=GENERIC -check-prefix=GENERIC-OPT define <2 x i64> @bar(<2 x i64> %a, <2 x i64> %b) nounwind readnone { ; CHECK-LABEL: bar: Index: test/CodeGen/AArch64/arm64-addr-type-promotion.ll =================================================================== --- test/CodeGen/AArch64/arm64-addr-type-promotion.ll +++ test/CodeGen/AArch64/arm64-addr-type-promotion.ll @@ -1,4 +1,5 @@ -; RUN: llc < %s -mtriple=arm64-apple-ios3.0.0 -aarch64-collect-loh=false | FileCheck %s +; RUN: llc < %s -mtriple=arm64-apple-ios3.0.0 -aarch64-enable-collect-loh=false \ +; RUN: | FileCheck %s ; rdar://13452552 ; Disable the collecting of LOH so that the labels do not get in the ; way of the NEXT patterns. Index: test/CodeGen/AArch64/arm64-ccmp-heuristics.ll =================================================================== --- test/CodeGen/AArch64/arm64-ccmp-heuristics.ll +++ test/CodeGen/AArch64/arm64-ccmp-heuristics.ll @@ -1,4 +1,5 @@ -; RUN: llc < %s -mcpu=cyclone -verify-machineinstrs -aarch64-ccmp | FileCheck %s +; RUN: llc < %s -mcpu=cyclone -verify-machineinstrs -aarch64-enable-ccmp \ +; RUN: | FileCheck %s target triple = "arm64-apple-ios7.0.0" @channelColumns = external global i64 Index: test/CodeGen/AArch64/arm64-ccmp.ll =================================================================== --- test/CodeGen/AArch64/arm64-ccmp.ll +++ test/CodeGen/AArch64/arm64-ccmp.ll @@ -1,4 +1,5 @@ -; RUN: llc < %s -mcpu=cyclone -verify-machineinstrs -aarch64-ccmp -aarch64-stress-ccmp | FileCheck %s +; RUN: llc < %s -mcpu=cyclone -verify-machineinstrs -aarch64-enable-ccmp \ +; RUN: -aarch64-stress-ccmp | FileCheck %s target triple = "arm64-apple-ios" ; CHECK: single_same Index: test/CodeGen/AArch64/arm64-collect-loh-garbage-crash.ll =================================================================== --- test/CodeGen/AArch64/arm64-collect-loh-garbage-crash.ll +++ test/CodeGen/AArch64/arm64-collect-loh-garbage-crash.ll @@ -1,4 +1,7 @@ -; RUN: llc -mtriple=arm64-apple-ios -O3 -aarch64-collect-loh -aarch64-collect-loh-bb-only=true -aarch64-collect-loh-pre-collect-register=false < %s -o - | FileCheck %s +; RUN: llc -mtriple=arm64-apple-ios -O3 -aarch64-enable-collect-loh \ +; RUN: -aarch64-collect-loh-bb-only=true \ +; RUN: -aarch64-collect-loh-pre-collect-register=false < %s -o - \ +; RUN: | FileCheck %s ; Check that the LOH analysis does not crash when the analysed chained ; contains instructions that are filtered out. ; Index: test/CodeGen/AArch64/arm64-collect-loh-str.ll =================================================================== --- test/CodeGen/AArch64/arm64-collect-loh-str.ll +++ test/CodeGen/AArch64/arm64-collect-loh-str.ll @@ -1,4 +1,5 @@ -; RUN: llc -mtriple=arm64-apple-ios -O2 -aarch64-collect-loh -aarch64-collect-loh-bb-only=false < %s -o - | FileCheck %s +; RUN: llc -mtriple=arm64-apple-ios -O2 -aarch64-enable-collect-loh \ +; RUN: -aarch64-collect-loh-bb-only=false < %s -o - | FileCheck %s ; Test case for . ; AdrpAddStr cannot be used when the store uses same ; register as address and value. Indeed, the related Index: test/CodeGen/AArch64/arm64-collect-loh.ll =================================================================== --- test/CodeGen/AArch64/arm64-collect-loh.ll +++ test/CodeGen/AArch64/arm64-collect-loh.ll @@ -1,5 +1,7 @@ -; RUN: llc -mtriple=arm64-apple-ios -O2 -aarch64-collect-loh -aarch64-collect-loh-bb-only=false < %s -o - | FileCheck %s -; RUN: llc -mtriple=arm64-linux-gnu -O2 -aarch64-collect-loh -aarch64-collect-loh-bb-only=false < %s -o - | FileCheck %s --check-prefix=CHECK-ELF +; RUN: llc -mtriple=arm64-apple-ios -O2 -aarch64-enable-collect-loh \ +; RUN: -aarch64-collect-loh-bb-only=false < %s -o - | FileCheck %s +; RUN: llc -mtriple=arm64-linux-gnu -O2 -aarch64-enable-collect-loh \ +; RUN: -aarch64-collect-loh-bb-only=false < %s -o - | FileCheck %s --check-prefix=CHECK-ELF ; CHECK-ELF-NOT: .loh ; CHECK-ELF-NOT: AdrpAdrp Index: test/CodeGen/AArch64/arm64-neon-add-sub.ll =================================================================== --- test/CodeGen/AArch64/arm64-neon-add-sub.ll +++ test/CodeGen/AArch64/arm64-neon-add-sub.ll @@ -1,4 +1,5 @@ -; RUN: llc < %s -verify-machineinstrs -mtriple=arm64-none-linux-gnu -mattr=+neon -aarch64-simd-scalar| FileCheck %s +; RUN: llc < %s -verify-machineinstrs -mtriple=arm64-none-linux-gnu \ +; RUN: -mattr=+neon -aarch64-enable-simd-scalar| FileCheck %s define <8 x i8> @add8xi8(<8 x i8> %A, <8 x i8> %B) { ;CHECK: add {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b Index: test/CodeGen/AArch64/arm64-promote-const.ll =================================================================== --- test/CodeGen/AArch64/arm64-promote-const.ll +++ test/CodeGen/AArch64/arm64-promote-const.ll @@ -3,7 +3,7 @@ ; RUN: llc < %s -mtriple=arm64-apple-ios7.0 -disable-machine-cse -aarch64-stress-promote-const -mcpu=cyclone | FileCheck -check-prefix=PROMOTED %s ; The REGULAR run just checks that the inputs passed to promote const expose ; the appropriate patterns. -; RUN: llc < %s -mtriple=arm64-apple-ios7.0 -disable-machine-cse -aarch64-promote-const=false -mcpu=cyclone | FileCheck -check-prefix=REGULAR %s +; RUN: llc < %s -mtriple=arm64-apple-ios7.0 -disable-machine-cse -aarch64-enable-promote-const=false -mcpu=cyclone | FileCheck -check-prefix=REGULAR %s %struct.uint8x16x4_t = type { [4 x <16 x i8>] } Index: test/CodeGen/AArch64/global-merge-group-by-use.ll =================================================================== --- test/CodeGen/AArch64/global-merge-group-by-use.ll +++ test/CodeGen/AArch64/global-merge-group-by-use.ll @@ -1,6 +1,7 @@ -; RUN: llc -mtriple=aarch64-apple-ios -asm-verbose=false -aarch64-collect-loh=false \ -; RUN: -aarch64-global-merge -global-merge-group-by-use -global-merge-ignore-single-use=false \ -; RUN: %s -o - | FileCheck %s +; RUN: llc -mtriple=aarch64-apple-ios -asm-verbose=false \ +; RUN: -aarch64-enable-collect-loh=false -aarch64-global-merge \ +; RUN: -global-merge-group-by-use -global-merge-ignore-single-use=false %s \ +; RUN: -o - | FileCheck %s ; We assume that globals of the same size aren't reordered inside a set. Index: test/CodeGen/AArch64/global-merge-ignore-single-use-minsize.ll =================================================================== --- test/CodeGen/AArch64/global-merge-ignore-single-use-minsize.ll +++ test/CodeGen/AArch64/global-merge-ignore-single-use-minsize.ll @@ -1,6 +1,6 @@ -; RUN: llc -mtriple=aarch64-apple-ios -asm-verbose=false -aarch64-collect-loh=false \ -; RUN: -O1 -global-merge-group-by-use -global-merge-ignore-single-use \ -; RUN: %s -o - | FileCheck %s +; RUN: llc -mtriple=aarch64-apple-ios -asm-verbose=false \ +; RUN: -aarch64-enable-collect-loh=false -O1 -global-merge-group-by-use \ +; RUN: -global-merge-ignore-single-use %s -o - | FileCheck %s ; Check that, at -O1, we only merge globals used in minsize functions. ; We assume that globals of the same size aren't reordered inside a set. Index: test/CodeGen/AArch64/global-merge-ignore-single-use.ll =================================================================== --- test/CodeGen/AArch64/global-merge-ignore-single-use.ll +++ test/CodeGen/AArch64/global-merge-ignore-single-use.ll @@ -1,6 +1,7 @@ -; RUN: llc -mtriple=aarch64-apple-ios -asm-verbose=false -aarch64-collect-loh=false \ -; RUN: -aarch64-global-merge -global-merge-group-by-use -global-merge-ignore-single-use \ -; RUN: %s -o - | FileCheck %s +; RUN: llc -mtriple=aarch64-apple-ios -asm-verbose=false \ +; RUN: -aarch64-enable-collect-loh=false -aarch64-global-merge \ +; RUN: -global-merge-group-by-use -global-merge-ignore-single-use %s -o - \ +; RUN: | FileCheck %s ; We assume that globals of the same size aren't reordered inside a set.