Index: lib/Transforms/InstCombine/InstCombineSelect.cpp
===================================================================
--- lib/Transforms/InstCombine/InstCombineSelect.cpp
+++ lib/Transforms/InstCombine/InstCombineSelect.cpp
@@ -912,6 +912,37 @@
   return nullptr;
 }
 
+/// If one of the operands is a sext/zext from i1 and the other is a constant,
+/// we may be able to create an i1 select which can be further folded to
+/// logical ops.
+static Instruction *foldSelectExtConst(InstCombiner::BuilderTy &Builder,
+                                       SelectInst &SI, Instruction *EI,
+                                       ConstantInt *C, bool isExtTrueVal,
+                                       bool isSigned) {
+  Value *SmallVal = EI->getOperand(0);
+  Type *SmallType = SmallVal->getType();
+
+  if (SmallType->getIntegerBitWidth() != 1)
+    return nullptr;
+
+  const APInt &CInt = C->getValue();
+
+  if (CInt != 0 && (isSigned || CInt != 1) &&
+      (!isSigned || !CInt.isAllOnesValue()))
+    return nullptr;
+
+  Value *SmallConst = ConstantInt::get(SmallType, CInt.trunc(1));
+  Value *TrueVal = isExtTrueVal ? SmallVal : SmallConst;
+  Value *FalseVal = isExtTrueVal ? SmallConst : SmallVal;
+  Value *Select = Builder.CreateSelect(SI.getOperand(0), TrueVal, FalseVal,
+                                       "fold." + SI.getName());
+
+  if (isSigned)
+    return new SExtInst(Select, SI.getType());
+
+  return new ZExtInst(Select, SI.getType());
+}
+
 Instruction *InstCombiner::visitSelectInst(SelectInst &SI) {
   Value *CondVal = SI.getCondition();
   Value *TrueVal = SI.getTrueValue();
@@ -1098,6 +1129,35 @@
     if (Instruction *IV = FoldSelectOpOp(SI, TI, FI))
       return IV;
 
+  // (select C, (sext X), const) -> (sext (select C, X, const')) and
+  // variations thereof when extending from i1, as that allows further folding
+  // into logic ops. When the sext is from a larger type, we prefer to have it
+  // as an operand.
+  if (TI) {
+    if (ConstantInt *C = dyn_cast<ConstantInt>(FalseVal)) {
+      if (isa<SExtInst>(TI))
+        if (Instruction *IV =
+                foldSelectExtConst(*Builder, SI, TI, C, true, true))
+          return IV;
+      if (isa<ZExtInst>(TI))
+        if (Instruction *IV =
+                foldSelectExtConst(*Builder, SI, TI, C, true, false))
+          return IV;
+    }
+  }
+  if (FI) {
+    if (ConstantInt *C = dyn_cast<ConstantInt>(TrueVal)) {
+      if (isa<SExtInst>(FI))
+        if (Instruction *IV =
+                foldSelectExtConst(*Builder, SI, FI, C, false, true))
+          return IV;
+      if (isa<ZExtInst>(FI))
+        if (Instruction *IV =
+                foldSelectExtConst(*Builder, SI, FI, C, false, false))
+          return IV;
+    }
+  }
+
   // See if we can fold the select into one of our operands.
   if (SelType->isIntOrIntVectorTy() || SelType->isFPOrFPVectorTy()) {
     if (Instruction *FoldI = FoldSelectIntoOp(SI, TrueVal, FalseVal))
Index: test/Transforms/InstCombine/select-bitext.ll
===================================================================
--- /dev/null
+++ test/Transforms/InstCombine/select-bitext.ll
@@ -0,0 +1,168 @@
+; RUN: opt < %s -instcombine -S | FileCheck %s
+
+; CHECK-LABEL: @test_sext1
+; CHECK: and
+; CHECK: sext
+define i32 @test_sext1(i32 %a, i32 %b) {
+  %cca = icmp sgt i32 %a, 0
+  %ccax = sext i1 %cca to i32
+  %ccb = icmp sgt i32 %b, 0
+  %r = select i1 %ccb, i32 %ccax, i32 0
+  ret i32 %r
+}
+
+; CHECK-LABEL: @test_sext2
+; CHECK: or
+; CHECK: sext
+define i32 @test_sext2(i32 %a, i32 %b) {
+  %cca = icmp sgt i32 %a, 0
+  %ccax = sext i1 %cca to i32
+  %ccb = icmp sgt i32 %b, 0
+  %r = select i1 %ccb, i32 -1, i32 %ccax
+  ret i32 %r
+}
+
+; CHECK-LABEL: @test_sext3
+; CHECK: icmp sgt
+; CHECK: icmp slt
+; CHECK: and
+; CHECK: sext
+define i32 @test_sext3(i32 %a, i32 %b) {
+  %cca = icmp sgt i32 %a, 0
+  %ccax = sext i1 %cca to i32
+  %ccb = icmp sgt i32 %b, 0
+  %r = select i1 %ccb, i32 0, i32 %ccax
+  ret i32 %r
+}
+
+; CHECK-LABEL: @test_sext4
+; CHECK: icmp sgt
+; CHECK: icmp slt
+; CHECK: or
+; CHECK: sext
+define i32 @test_sext4(i32 %a, i32 %b) {
+  %cca = icmp sgt i32 %a, 0
+  %ccax = sext i1 %cca to i32
+  %ccb = icmp sgt i32 %b, 0
+  %r = select i1 %ccb, i32 %ccax, i32 -1
+  ret i32 %r
+}
+
+; CHECK-LABEL: @test_zext1
+; CHECK: and
+; CHECK: zext
+define i32 @test_zext1(i32 %a, i32 %b) {
+  %cca = icmp sgt i32 %a, 0
+  %ccax = zext i1 %cca to i32
+  %ccb = icmp sgt i32 %b, 0
+  %r = select i1 %ccb, i32 %ccax, i32 0
+  ret i32 %r
+}
+
+; CHECK-LABEL: @test_zext2
+; CHECK: or
+; CHECK: zext
+define i32 @test_zext2(i32 %a, i32 %b) {
+  %cca = icmp sgt i32 %a, 0
+  %ccax = zext i1 %cca to i32
+  %ccb = icmp sgt i32 %b, 0
+  %r = select i1 %ccb, i32 1, i32 %ccax
+  ret i32 %r
+}
+
+; CHECK-LABEL: @test_zext3
+; CHECK: icmp sgt
+; CHECK: icmp slt
+; CHECK: and
+; CHECK: zext
+define i32 @test_zext3(i32 %a, i32 %b) {
+  %cca = icmp sgt i32 %a, 0
+  %ccax = zext i1 %cca to i32
+  %ccb = icmp sgt i32 %b, 0
+  %r = select i1 %ccb, i32 0, i32 %ccax
+  ret i32 %r
+}
+
+; CHECK-LABEL: @test_zext4
+; CHECK: icmp sgt
+; CHECK: icmp slt
+; CHECK: or
+; CHECK: zext
+define i32 @test_zext4(i32 %a, i32 %b) {
+  %cca = icmp sgt i32 %a, 0
+  %ccax = zext i1 %cca to i32
+  %ccb = icmp sgt i32 %b, 0
+  %r = select i1 %ccb, i32 %ccax, i32 1
+  ret i32 %r
+}
+
+; CHECK-LABEL: @test_negative_sext
+; CHECK: sext
+; CHECK: select
+define i32 @test_negative_sext(i1 %a, i1 %cc) {
+  %a.ext = sext i1 %a to i32
+  %r = select i1 %cc, i32 %a.ext, i32 1
+  ret i32 %r
+}
+
+; CHECK-LABEL: @test_negative_zext
+; CHECK: zext
+; CHECK: select
+define i32 @test_negative_zext(i1 %a, i1 %cc) {
+  %a.ext = zext i1 %a to i32
+  %r = select i1 %cc, i32 %a.ext, i32 -1
+  ret i32 %r
+}
+
+; CHECK-LABEL: @test_bits_sext
+; CHECK: sext
+; CHECK: select
+define i32 @test_bits_sext(i8 %a, i1 %cc) {
+  %a.ext = sext i8 %a to i32
+  %r = select i1 %cc, i32 %a.ext, i32 -128
+  ret i32 %r
+}
+
+; CHECK-LABEL: @test_bits_zext
+; CHECK: zext
+; CHECK: select
+define i32 @test_bits_zext(i8 %a, i1 %cc) {
+  %a.ext = zext i8 %a to i32
+  %r = select i1 %cc, i32 %a.ext, i32 255
+  ret i32 %r
+}
+
+; CHECK-LABEL: @test_op_op
+; CHECK: select
+; CHECK: sext
+define i32 @test_op_op(i32 %a, i32 %b, i32 %c) {
+  %cca = icmp sgt i32 %a, 0
+  %ccax = sext i1 %cca to i32
+  %ccb = icmp sgt i32 %b, 0
+  %ccbx = sext i1 %ccb to i32
+  %ccc = icmp sgt i32 %c, 0
+  %r = select i1 %ccc, i32 %ccax, i32 %ccbx
+  ret i32 %r
+}
+
+; CHECK-LABEL: @test_no_vectors1
+; CHECK: sext
+; CHECK: select
+define <2 x i32> @test_no_vectors1(<2 x i32> %a, <2 x i32> %b, <2 x i32> %c) {
+  %cca = icmp sgt <2 x i32> %a, %b
+  %ccax = sext <2 x i1> %cca to <2 x i32>
+  %ccb = icmp sgt <2 x i32> %b, %c
+  %r = select <2 x i1> %ccb, <2 x i32> %ccax, <2 x i32> <i32 0, i32 0>
+  ret <2 x i32> %r
+}
+
+; CHECK-LABEL: @test_no_vectors2
+; CHECK: sext
+; CHECK: select
+define <2 x i32> @test_no_vectors2(<2 x i32> %a, <2 x i32> %b, i32 %c) {
+  %cca = icmp sgt <2 x i32> %a, %b
+  %ccax = sext <2 x i1> %cca to <2 x i32>
+  %ccb = icmp sgt i32 %c, 0
+  %r = select i1 %ccb, <2 x i32> %ccax, <2 x i32> <i32 0, i32 0>
+  ret <2 x i32> %r
+}