Index: lib/CodeGen/SelectionDAG/DAGCombiner.cpp =================================================================== --- lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -4827,7 +4827,10 @@ } // fold (srl (shl x, c), c) -> (and x, cst2) - if (N1C && N0.getOpcode() == ISD::SHL && N0.getOperand(1) == N1) { + if (N1C && N0.getOpcode() == ISD::SHL && + isa(N0.getOperand(1)) && + cast(N0.getOperand(1))->getZExtValue() == + N1C->getZExtValue()) { unsigned BitSize = N0.getScalarValueSizeInBits(); if (BitSize <= 64) { uint64_t ShAmt = N1C->getZExtValue() + 64 - BitSize; Index: test/CodeGen/X86/cmp-zext-combine.ll =================================================================== --- /dev/null +++ test/CodeGen/X86/cmp-zext-combine.ll @@ -0,0 +1,14 @@ +; RUN: llc -march=x86-64 < %s | FileCheck %s + +define i32 @nonzero(i32) { +; CHECK-LABEL: nonzero: +; CHECK-NEXT: xorl %eax, %eax +; CHECK-NEXT: testl %edi, %edi +; CHECK-NEXT: setne %al +; CHECK-NEXT: retq + %b = zext i32 %0 to i64 + %c = shl i64 %b, 32 + %d = icmp ugt i64 %c, 4294967295 + %rv = zext i1 %d to i32 + ret i32 %rv +}