Index: lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp
===================================================================
--- lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp
+++ lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp
@@ -33,6 +33,7 @@
 #include "llvm/Support/TargetRegistry.h"
 #include "llvm/Support/raw_ostream.h"
 #include "llvm/Target/TargetMachine.h"
+#include "llvm/Target/TargetSubtargetInfo.h"
 using namespace llvm;
 
 namespace {
@@ -114,14 +115,11 @@
                                                   OutContext, OutStreamer,
                                                   *MAI));
 
-  // FIXME: It would be nice if we can avoid createing a new instance of
-  // MCSubtargetInfo here given TargetSubtargetInfo is available. However,
-  // we have to watch out for asm directives which can change subtarget
-  // state. e.g. .code 16, .code 32.
-  OwningPtr<MCSubtargetInfo>
-    STI(TM.getTarget().createMCSubtargetInfo(TM.getTargetTriple(),
-                                             TM.getTargetCPU(),
-                                             TM.getTargetFeatureString()));
+  // Reuse the existing Subtarget, because the AsmParser will
+  // modify it.  For example, when switching between ARM and
+  // Thumb mode.
+  const MCSubtargetInfo* STC = TM.getSubtargetImpl();
+  MCSubtargetInfo* STI = const_cast<MCSubtargetInfo*>(STC);
   OwningPtr<MCTargetAsmParser>
     TAP(TM.getTarget().createMCAsmParser(*STI, *Parser, *MII));
   if (!TAP)
Index: test/CodeGen/ARM/2013-11-22-inline-asm-switch-mode.ll
===================================================================
--- /dev/null
+++ test/CodeGen/ARM/2013-11-22-inline-asm-switch-mode.ll
@@ -0,0 +1,13 @@
+;RUN:  llc -mtriple=thumbv7-linux-gnueabi -filetype=obj < %s | llvm-objdump -arch=thumb -d - | FileCheck %s
+
+target triple = "thumbv7--linux-gnueabi"
+
+define hidden void @bah(i8* %start) #0 align 2 {
+  %1 = ptrtoint i8* %start to i32
+  %2 = tail call i32 asm sideeffect "@ Enter ARM Mode  \0A\09adr r3, 1f \0A\09bx  r3 \0A\09.align 2 \0A\09.code 32 \0A1:  push {r7} \0A\09mov r7, $4 \0A\09svc 0x0 \0A
+  ret void
+}
+; CHECK: $a
+; CHECK-NEXT: 04 70
+; CHECK-NEXT: 2d e5
+