Index: src/UnwindRegistersRestore.S
===================================================================
--- src/UnwindRegistersRestore.S
+++ src/UnwindRegistersRestore.S
@@ -312,6 +312,10 @@
 
 #if !defined(__ARM_ARCH_ISA_ARM)
   .thumb
+#define INST_W .inst.w
+#else
+  .arm
+#define INST_W .inst
 #endif
 
 @
@@ -358,16 +362,16 @@
 @  values pointer is in r0
 @
   .p2align 2
-  .fpu vfpv3-d16
 DEFINE_LIBUNWIND_PRIVATE_FUNCTION(_ZN9libunwind13Registers_arm19restoreVFPWithFLDMDEPy)
-  @ VFP and iwMMX instructions are only available when compiling with the flags
-  @ that enable them. We do not want to do that in the library (because we do not
-  @ want the compiler to generate instructions that access those) but this is
-  @ only accessed if the personality routine needs these registers. Use of
-  @ these registers implies they are, actually, available on the target, so
-  @ it's ok to execute.
-  @ So, generate the instruction using the corresponding coprocessor mnemonic.
-  vldmia r0, {d0-d15}
+@ Here, we use .inst (or .inst.w) to encode the floating-point operations. This
+@ avoids clang setting the build attribute for floating-point hardware, meaning
+@ that this library can still be linked for and run on a CPU with no FPU. This
+@ is safe, as these functions will not be called unless the VFP registers are
+@ mentioned in the unwind tables. The encodings of these instructions are the
+@ same for ARM and Thumb2, these do not need to be valid instructions for Thumb1
+@ as they can never be called on a Thumb1-only CPU.
+@ vldmia r0, {d0-d15}
+  INST_W 0xec900b20
   JMP(lr)
 
 @
@@ -377,9 +381,9 @@
 @  values pointer is in r0
 @
   .p2align 2
-  .fpu vfpv3-d16
 DEFINE_LIBUNWIND_PRIVATE_FUNCTION(_ZN9libunwind13Registers_arm19restoreVFPWithFLDMXEPy)
-  vldmia r0, {d0-d15} @ fldmiax is deprecated in ARMv7+ and now behaves like vldmia
+@ vldmia r0, {d0-d15} @ fldmiax is deprecated in ARMv7+ and now behaves like vldmia
+  INST_W 0xec900b20
   JMP(lr)
 
 @
@@ -389,9 +393,9 @@
 @  values pointer is in r0
 @
   .p2align 2
-  .fpu vfpv3
 DEFINE_LIBUNWIND_PRIVATE_FUNCTION(_ZN9libunwind13Registers_arm12restoreVFPv3EPy)
-  vldmia r0, {d16-d31}
+@ vldmia r0, {d16-d31}
+  INST_W 0xecd00b20
   JMP(lr)
 
 #if defined(__ARM_WMMX)
Index: src/UnwindRegistersSave.S
===================================================================
--- src/UnwindRegistersSave.S
+++ src/UnwindRegistersSave.S
@@ -293,6 +293,9 @@
 
 #if !defined(__ARM_ARCH_ISA_ARM)
   .thumb
+#define INST_W .inst.w
+#else
+#define INST_W .inst
 #endif
 
 @
@@ -346,9 +349,18 @@
 @  values pointer is in r0
 @
   .p2align 2
-  .fpu vfpv3-d16
 DEFINE_LIBUNWIND_PRIVATE_FUNCTION(_ZN9libunwind13Registers_arm16saveVFPWithFSTMDEPy)
-  vstmia r0, {d0-d15}
+@
+@ Here, we use .inst (or .inst.w) to encode the floating-point operations. This
+@ avoids clang setting the build attribute for floating-point hardware, meaning
+@ that this library can still be linked for and run on a CPU with no FPU. This
+@ is safe, as these functions will not be called unless the VFP registers are
+@ mentioned in the unwind tables. The encodings of these instructions are the
+@ same for ARM and Thumb2, these do not need to be valid instructions for Thumb1
+@ as they can never be called on a Thumb1-only CPU.
+@
+@ vstmia r0, {d0-d15}
+  INST_W 0xec800b20
   JMP(lr)
 
 @
@@ -358,9 +370,9 @@
 @  values pointer is in r0
 @
   .p2align 2
-  .fpu vfpv3-d16
 DEFINE_LIBUNWIND_PRIVATE_FUNCTION(_ZN9libunwind13Registers_arm16saveVFPWithFSTMXEPy)
-  vstmia r0, {d0-d15} @ fstmiax is deprecated in ARMv7+ and now behaves like vstmia
+@ vstmia r0, {d0-d15} @ fstmiax is deprecated in ARMv7+ and now behaves like vstmia
+  INST_W 0xec800b20
   JMP(lr)
 
 @
@@ -370,16 +382,9 @@
 @  values pointer is in r0
 @
   .p2align 2
-  .fpu vfpv3
 DEFINE_LIBUNWIND_PRIVATE_FUNCTION(_ZN9libunwind13Registers_arm9saveVFPv3EPy)
-  @ VFP and iwMMX instructions are only available when compiling with the flags
-  @ that enable them. We do not want to do that in the library (because we do not
-  @ want the compiler to generate instructions that access those) but this is
-  @ only accessed if the personality routine needs these registers. Use of
-  @ these registers implies they are, actually, available on the target, so
-  @ it's ok to execute.
-  @ So, generate the instructions using the corresponding coprocessor mnemonic.
-  vstmia r0, {d16-d31}
+@ vstmia r0, {d16-d31}
+  INST_W 0xecc00b20
   JMP(lr)
 
 #if defined(_LIBUNWIND_ARM_WMMX)