Index: lib/Target/AArch64/AArch64.td
===================================================================
--- lib/Target/AArch64/AArch64.td
+++ lib/Target/AArch64/AArch64.td
@@ -250,6 +250,7 @@
                                    FeatureMacroOpFusion,
                                    FeatureNEON,
                                    FeaturePostRAScheduler,
+                                   FeaturePredictableSelectIsExpensive,
                                    HasV8_1aOps]>;
 
 def : ProcessorModel<"generic", NoSchedModel, [
Index: lib/Target/AArch64/AArch64Subtarget.cpp
===================================================================
--- lib/Target/AArch64/AArch64Subtarget.cpp
+++ lib/Target/AArch64/AArch64Subtarget.cpp
@@ -75,6 +75,7 @@
     MaxPrefetchIterationsAhead = 11;
     break;
   case Vulcan:
+    CacheLineSize = 64;
     MaxInterleaveFactor = 4;
     break;
   case CortexA35: break;