Index: llvm/trunk/lib/CodeGen/ExpandPostRAPseudos.cpp =================================================================== --- llvm/trunk/lib/CodeGen/ExpandPostRAPseudos.cpp +++ llvm/trunk/lib/CodeGen/ExpandPostRAPseudos.cpp @@ -51,7 +51,7 @@ bool LowerSubregToReg(MachineInstr *MI); bool LowerCopy(MachineInstr *MI); - void TransferImplicitDefs(MachineInstr *MI); + void TransferImplicitOperands(MachineInstr *MI); }; } // end anonymous namespace @@ -61,20 +61,16 @@ INITIALIZE_PASS(ExpandPostRA, "postrapseudos", "Post-RA pseudo instruction expansion pass", false, false) -/// TransferImplicitDefs - MI is a pseudo-instruction, and the lowered -/// replacement instructions immediately precede it. Copy any implicit-def +/// TransferImplicitOperands - MI is a pseudo-instruction, and the lowered +/// replacement instructions immediately precede it. Copy any implicit /// operands from MI to the replacement instruction. -void -ExpandPostRA::TransferImplicitDefs(MachineInstr *MI) { +void ExpandPostRA::TransferImplicitOperands(MachineInstr *MI) { MachineBasicBlock::iterator CopyMI = MI; --CopyMI; - for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { - MachineOperand &MO = MI->getOperand(i); - if (!MO.isReg() || !MO.isImplicit() || MO.isUse()) - continue; - CopyMI->addOperand(MachineOperand::CreateReg(MO.getReg(), true, true)); - } + for (const MachineOperand &MO : MI->implicit_operands()) + if (MO.isReg()) + CopyMI->addOperand(MO); } bool ExpandPostRA::LowerSubregToReg(MachineInstr *MI) { @@ -167,7 +163,7 @@ DstMO.getReg(), SrcMO.getReg(), SrcMO.isKill()); if (MI->getNumOperands() > 2) - TransferImplicitDefs(MI); + TransferImplicitOperands(MI); DEBUG({ MachineBasicBlock::iterator dMI = MI; dbgs() << "replaced by: " << *(--dMI); Index: llvm/trunk/test/CodeGen/ARM/twoaddrinstr.ll =================================================================== --- llvm/trunk/test/CodeGen/ARM/twoaddrinstr.ll +++ llvm/trunk/test/CodeGen/ARM/twoaddrinstr.ll @@ -5,6 +5,7 @@ ; This was orriginally a crasher trying to schedule the instructions. ; CHECK-LABEL: PR13378: ; CHECK: vld1.32 +; CHECK-NEXT: vmov.i32 ; CHECK-NEXT: vst1.32 ; CHECK-NEXT: vst1.32 ; CHECK-NEXT: vmov.f32 Index: llvm/trunk/test/CodeGen/X86/pr28560.ll =================================================================== --- llvm/trunk/test/CodeGen/X86/pr28560.ll +++ llvm/trunk/test/CodeGen/X86/pr28560.ll @@ -0,0 +1,13 @@ +; RUN: llc -mtriple=i686-pc-linux -print-after=postrapseudos < %s 2>&1 | FileCheck %s + +; CHECK: MOV8rr %{{[A-D]}}L, %E[[R:[A-D]]]X, %E[[R]]X +define i32 @foo(i32 %i, i32 %k, i8* %p) { + %f = icmp ne i32 %i, %k + %s = zext i1 %f to i8 + %ret = zext i1 %f to i32 + br label %next +next: + %d = add i8 %s, 5 + store i8 %d, i8* %p + ret i32 %ret +}