Index: lib/CodeGen/MIRParser/MILexer.h
===================================================================
--- lib/CodeGen/MIRParser/MILexer.h
+++ lib/CodeGen/MIRParser/MILexer.h
@@ -38,6 +38,7 @@
     underscore,
     colon,
     coloncolon,
+    dot,
     exclaim,
     lparen,
     rparen,
Index: lib/CodeGen/MIRParser/MILexer.cpp
===================================================================
--- lib/CodeGen/MIRParser/MILexer.cpp
+++ lib/CodeGen/MIRParser/MILexer.cpp
@@ -231,7 +231,7 @@
 }
 
 static Cursor maybeLexIdentifier(Cursor C, MIToken &Token) {
-  if (!isalpha(C.peek()) && C.peek() != '_' && C.peek() != '.')
+  if (!isalpha(C.peek()) && C.peek() != '_')
     return None;
   auto Range = C;
   while (isIdentifierChar(C.peek()))
@@ -366,6 +366,11 @@
   return C;
 }
 
+/// Returns true for a character allowed in a register name.
+static bool isRegisterChar(char C) {
+  return isIdentifierChar(C) && C != '.';
+}
+
 static Cursor maybeLexRegister(Cursor C, MIToken &Token) {
   if (C.peek() != '%')
     return None;
@@ -373,7 +378,7 @@
     return lexVirtualRegister(C, Token);
   auto Range = C;
   C.advance(); // Skip '%'
-  while (isIdentifierChar(C.peek()))
+  while (isRegisterChar(C.peek()))
     C.advance();
   Token.reset(MIToken::NamedRegister, Range.upto(C))
       .setStringValue(Range.upto(C).drop_front(1)); // Drop the '%'
@@ -485,6 +490,8 @@
   switch (C) {
   case ',':
     return MIToken::comma;
+  case '.':
+    return MIToken::dot;
   case '=':
     return MIToken::equal;
   case ':':
Index: lib/CodeGen/MIRParser/MIParser.cpp
===================================================================
--- lib/CodeGen/MIRParser/MIParser.cpp
+++ lib/CodeGen/MIRParser/MIParser.cpp
@@ -881,10 +881,10 @@
 }
 
 bool MIParser::parseSubRegisterIndex(unsigned &SubReg) {
-  assert(Token.is(MIToken::colon));
+  assert(Token.is(MIToken::dot));
   lex();
   if (Token.isNot(MIToken::Identifier))
-    return error("expected a subregister index after ':'");
+    return error("expected a subregister index after '.'");
   auto Name = Token.stringValue();
   SubReg = getSubRegIndex(Name);
   if (!SubReg)
@@ -969,7 +969,7 @@
     return true;
   lex();
   unsigned SubReg = 0;
-  if (Token.is(MIToken::colon)) {
+  if (Token.is(MIToken::dot)) {
     if (parseSubRegisterIndex(SubReg))
       return true;
   }
Index: lib/CodeGen/MIRPrinter.cpp
===================================================================
--- lib/CodeGen/MIRPrinter.cpp
+++ lib/CodeGen/MIRPrinter.cpp
@@ -773,7 +773,7 @@
     printReg(Op.getReg(), OS, TRI);
     // Print the sub register.
     if (Op.getSubReg() != 0)
-      OS << ':' << TRI->getSubRegIndexName(Op.getSubReg());
+      OS << '.' << TRI->getSubRegIndexName(Op.getSubReg());
     if (ShouldPrintRegisterTies && Op.isTied() && !Op.isDef())
       OS << "(tied-def " << Op.getParent()->findTiedOperandIdx(I) << ")";
     assert((!IsDef || MRI) && "for IsDef, MRI must be provided");
Index: test/CodeGen/MIR/X86/expected-subregister-after-colon.mir
===================================================================
--- test/CodeGen/MIR/X86/expected-subregister-after-colon.mir
+++ test/CodeGen/MIR/X86/expected-subregister-after-colon.mir
@@ -19,8 +19,8 @@
 body: |
   bb.0.entry:
     %0 = COPY %edi
-    ; CHECK: [[@LINE+1]]:20: expected a subregister index after ':'
-    %1 = COPY %0 : 42
+    ; CHECK: [[@LINE+1]]:20: expected a subregister index after '.'
+    %1 = COPY %0 . 42
     %2 = AND8ri %1, 1, implicit-def %eflags
     %al = COPY %2
     RETQ %al
Index: test/CodeGen/MIR/X86/subregister-operands.mir
===================================================================
--- test/CodeGen/MIR/X86/subregister-operands.mir
+++ test/CodeGen/MIR/X86/subregister-operands.mir
@@ -22,9 +22,9 @@
   bb.0.entry:
     liveins: %edi
     ; CHECK:      %0 = COPY %edi
-    ; CHECK-NEXT: %1 = COPY %0:sub_8bit
+    ; CHECK-NEXT: %1 = COPY %0.sub_8bit
     %0 = COPY %edi
-    %1 = COPY %0:sub_8bit
+    %1 = COPY %0.sub_8bit
     %2 = AND8ri %1, 1, implicit-def %eflags
     %al = COPY %2
     RETQ %al
Index: test/CodeGen/MIR/X86/unknown-subregister-index.mir
===================================================================
--- test/CodeGen/MIR/X86/unknown-subregister-index.mir
+++ test/CodeGen/MIR/X86/unknown-subregister-index.mir
@@ -22,7 +22,7 @@
   bb.0.entry:
     %0 = COPY %edi
     ; CHECK: [[@LINE+1]]:18: use of unknown subregister index 'bit8'
-    %1 = COPY %0:bit8
+    %1 = COPY %0.bit8
     %2 = AND8ri %1, 1, implicit-def %eflags
     %al = COPY %2
     RETQ %al