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[MI] Fix MachineInstr::isInvariantLoad.
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Authored by jlebar on Jul 13 2016, 3:33 PM.

Details

Summary

Previously it would say we had an invariant load if any of the memory
operands were invariant. But the load should be invariant only if *all*
the memory operands are invariant.

No testcase because this has proven to be very difficult to tickle in
practice. As just one example, ARM's ldrd instruction, which loads 64
bits into two 32-bit regs, is theoretically affected by this. But when
it's produced, it loses its memoperands' invariance bits!

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Repository
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Event Timeline

jlebar updated this revision to Diff 63873.Jul 13 2016, 3:33 PM
jlebar retitled this revision from to [MI] Fix MachineInstr::isInvariantLoad..
jlebar updated this object.
jlebar added a reviewer: jfb.
jlebar added a subscriber: llvm-commits.
hfinkel accepted this revision.Jul 13 2016, 3:36 PM
hfinkel added a reviewer: hfinkel.
hfinkel added a subscriber: hfinkel.

LGTM

This revision is now accepted and ready to land.Jul 13 2016, 3:36 PM
This revision was automatically updated to reflect the committed changes.
jfb edited edge metadata.Jul 13 2016, 4:26 PM

lgtm after the facts. ty!