Index: lib/Target/AArch64/AArch64TargetMachine.cpp
===================================================================
--- lib/Target/AArch64/AArch64TargetMachine.cpp
+++ lib/Target/AArch64/AArch64TargetMachine.cpp
@@ -185,6 +185,10 @@
                         Options, getEffectiveRelocModel(TT, RM), CM, OL),
       TLOF(createTLOF(getTargetTriple())),
       Subtarget(TT, CPU, FS, *this, LittleEndian) {
+  assert((Options.MCOptions.ABIName.empty() ||
+          Options.MCOptions.ABIName == "aapcs" ||
+          Options.MCOptions.ABIName == "darwinpcs") &&
+         "Unexpected ABI");
   initReciprocals(*this, Subtarget);
   initAsmInfo();
 }
Index: lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
===================================================================
--- lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
+++ lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
@@ -149,6 +149,7 @@
                       FS, Options, getEffectiveRelocModel(RM), CM, OptLevel),
     TLOF(createTLOF(getTargetTriple())),
     IntrinsicInfo() {
+  assert(Options.MCOptions.ABIName.empty() && "Unexpected ABI");
   setRequiresStructuredCFG(true);
   initAsmInfo();
 }
Index: lib/Target/AVR/AVRTargetMachine.cpp
===================================================================
--- lib/Target/AVR/AVRTargetMachine.cpp
+++ lib/Target/AVR/AVRTargetMachine.cpp
@@ -47,6 +47,7 @@
           T, "e-p:16:8:8-i8:8:8-i16:8:8-i32:8:8-i64:8:8-f32:8:8-f64:8:8-n8", TT,
           getCPU(CPU), FS, Options, getEffectiveRelocModel(RM), CM, OL),
       SubTarget(TT, getCPU(CPU), FS, *this) {
+  assert(Options.MCOptions.ABIName.empty() && "Unexpected ABI");
   this->TLOF = make_unique<AVRTargetObjectFile>();
   initAsmInfo();
 }
Index: lib/Target/BPF/BPFTargetMachine.cpp
===================================================================
--- lib/Target/BPF/BPFTargetMachine.cpp
+++ lib/Target/BPF/BPFTargetMachine.cpp
@@ -52,6 +52,7 @@
                         getEffectiveRelocModel(RM), CM, OL),
       TLOF(make_unique<TargetLoweringObjectFileELF>()),
       Subtarget(TT, CPU, FS, *this) {
+  assert(Options.MCOptions.ABIName.empty() && "Unexpected ABI");
   initAsmInfo();
 }
 namespace {
Index: lib/Target/Hexagon/HexagonTargetMachine.cpp
===================================================================
--- lib/Target/Hexagon/HexagonTargetMachine.cpp
+++ lib/Target/Hexagon/HexagonTargetMachine.cpp
@@ -152,6 +152,7 @@
           TT, CPU, FS, Options, getEffectiveRelocModel(RM), CM,
           (HexagonNoOpt ? CodeGenOpt::None : OL)),
       TLOF(make_unique<HexagonTargetObjectFile>()) {
+  assert(Options.MCOptions.ABIName.empty() && "Unexpected ABI");
   initAsmInfo();
 }
 
Index: lib/Target/Lanai/LanaiTargetMachine.cpp
===================================================================
--- lib/Target/Lanai/LanaiTargetMachine.cpp
+++ lib/Target/Lanai/LanaiTargetMachine.cpp
@@ -62,6 +62,7 @@
                         getEffectiveRelocModel(RM), CodeModel, OptLevel),
       Subtarget(TT, Cpu, FeatureString, *this, Options, CodeModel, OptLevel),
       TLOF(new LanaiTargetObjectFile()) {
+  assert(Options.MCOptions.ABIName.empty() && "Unexpected ABI");
   initAsmInfo();
 }
 
Index: lib/Target/MSP430/MSP430TargetMachine.cpp
===================================================================
--- lib/Target/MSP430/MSP430TargetMachine.cpp
+++ lib/Target/MSP430/MSP430TargetMachine.cpp
@@ -43,6 +43,7 @@
       TLOF(make_unique<TargetLoweringObjectFileELF>()),
       // FIXME: Check DataLayout string.
       Subtarget(TT, CPU, FS, *this) {
+  assert(Options.MCOptions.ABIName.empty() && "Unexpected ABI");
   initAsmInfo();
 }
 
Index: lib/Target/NVPTX/NVPTXTargetMachine.cpp
===================================================================
--- lib/Target/NVPTX/NVPTXTargetMachine.cpp
+++ lib/Target/NVPTX/NVPTXTargetMachine.cpp
@@ -111,6 +111,7 @@
       is64bit(is64bit),
       TLOF(make_unique<NVPTXTargetObjectFile>()),
       Subtarget(TT, CPU, FS, *this) {
+  assert(Options.MCOptions.ABIName.empty() && "Unexpected ABI");
   if (TT.getOS() == Triple::NVCL)
     drvInterface = NVPTX::NVCL;
   else
Index: lib/Target/Sparc/SparcTargetMachine.cpp
===================================================================
--- lib/Target/Sparc/SparcTargetMachine.cpp
+++ lib/Target/Sparc/SparcTargetMachine.cpp
@@ -71,6 +71,7 @@
                         getEffectiveRelocModel(RM), CM, OL),
       TLOF(make_unique<SparcELFTargetObjectFile>()),
       Subtarget(TT, CPU, FS, *this, is64bit), is64Bit(is64bit) {
+  assert(Options.MCOptions.ABIName.empty() && "Unexpected ABI");
   initAsmInfo();
 }
 
Index: lib/Target/SystemZ/SystemZTargetMachine.cpp
===================================================================
--- lib/Target/SystemZ/SystemZTargetMachine.cpp
+++ lib/Target/SystemZ/SystemZTargetMachine.cpp
@@ -98,6 +98,7 @@
                         getEffectiveRelocModel(RM), CM, OL),
       TLOF(make_unique<TargetLoweringObjectFileELF>()),
       Subtarget(TT, CPU, FS, *this) {
+  assert(Options.MCOptions.ABIName.empty() && "Unexpected ABI");
   initAsmInfo();
 }
 
Index: lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
===================================================================
--- lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
+++ lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
@@ -57,6 +57,8 @@
                         TT, CPU, FS, Options, getEffectiveRelocModel(RM),
                         CM, OL),
       TLOF(make_unique<WebAssemblyTargetObjectFile>()) {
+  assert(Options.MCOptions.ABIName.empty() && "Unexpected ABI");
+
   // WebAssembly type-checks expressions, but a noreturn function with a return
   // type that doesn't match the context will cause a check failure. So we lower
   // LLVM 'unreachable' to ISD::TRAP and then lower that to WebAssembly's
Index: lib/Target/X86/X86TargetMachine.cpp
===================================================================
--- lib/Target/X86/X86TargetMachine.cpp
+++ lib/Target/X86/X86TargetMachine.cpp
@@ -153,6 +153,8 @@
                         getEffectiveRelocModel(TT, RM), CM, OL),
       TLOF(createTLOF(getTargetTriple())),
       Subtarget(TT, CPU, FS, *this, Options.StackAlignmentOverride) {
+  assert(Options.MCOptions.ABIName.empty() && "Unexpected ABI");
+
   // Windows stack unwinder gets confused when execution flow "falls through"
   // after a call to 'noreturn' function.
   // To prevent that, we emit a trap for 'unreachable' IR instructions.
Index: lib/Target/XCore/XCoreTargetMachine.cpp
===================================================================
--- lib/Target/XCore/XCoreTargetMachine.cpp
+++ lib/Target/XCore/XCoreTargetMachine.cpp
@@ -40,6 +40,7 @@
           TT, CPU, FS, Options, getEffectiveRelocModel(RM), CM, OL),
       TLOF(make_unique<XCoreTargetObjectFile>()),
       Subtarget(TT, CPU, FS, *this) {
+  assert(Options.MCOptions.ABIName.empty() && "Unexpected ABI");
   initAsmInfo();
 }