Index: llvm/trunk/lib/CodeGen/BranchFolding.h =================================================================== --- llvm/trunk/lib/CodeGen/BranchFolding.h +++ llvm/trunk/lib/CodeGen/BranchFolding.h @@ -11,6 +11,7 @@ #define LLVM_LIB_CODEGEN_BRANCHFOLDING_H #include "llvm/ADT/SmallPtrSet.h" +#include "llvm/CodeGen/LivePhysRegs.h" #include "llvm/CodeGen/MachineBasicBlock.h" #include "llvm/Support/BlockFrequency.h" #include @@ -21,7 +22,6 @@ class MachineFunction; class MachineModuleInfo; class MachineLoopInfo; - class RegScavenger; class TargetInstrInfo; class TargetRegisterInfo; @@ -98,11 +98,12 @@ bool AfterBlockPlacement; bool EnableTailMerge; bool EnableHoistCommonCode; + bool UpdateLiveIns; const TargetInstrInfo *TII; const TargetRegisterInfo *TRI; MachineModuleInfo *MMI; MachineLoopInfo *MLI; - RegScavenger *RS; + LivePhysRegs LiveRegs; public: /// \brief This class keeps track of branch frequencies of newly created @@ -130,8 +131,7 @@ bool TryTailMergeBlocks(MachineBasicBlock* SuccBB, MachineBasicBlock* PredBB); void setCommonTailEdgeWeights(MachineBasicBlock &TailMBB); - void MaintainLiveIns(MachineBasicBlock *CurMBB, - MachineBasicBlock *NewMBB); + void computeLiveIns(MachineBasicBlock &MBB); void ReplaceTailWithBranchTo(MachineBasicBlock::iterator OldInst, MachineBasicBlock *NewDest); MachineBasicBlock *SplitMBBAt(MachineBasicBlock &CurMBB, Index: llvm/trunk/lib/CodeGen/BranchFolding.cpp =================================================================== --- llvm/trunk/lib/CodeGen/BranchFolding.cpp +++ llvm/trunk/lib/CodeGen/BranchFolding.cpp @@ -32,7 +32,6 @@ #include "llvm/CodeGen/MachineRegisterInfo.h" #include "llvm/CodeGen/Passes.h" #include "llvm/CodeGen/TargetPassConfig.h" -#include "llvm/CodeGen/RegisterScavenging.h" #include "llvm/IR/Function.h" #include "llvm/Support/CommandLine.h" #include "llvm/Support/Debug.h" @@ -212,13 +211,10 @@ TRI = tri; MMI = mmi; MLI = mli; - RS = nullptr; - // Use a RegScavenger to help update liveness when required. MachineRegisterInfo &MRI = MF.getRegInfo(); - if (MRI.tracksLiveness() && TRI->trackLivenessAfterRegAlloc(MF)) - RS = new RegScavenger(); - else + UpdateLiveIns = MRI.tracksLiveness() && TRI->trackLivenessAfterRegAlloc(MF); + if (!UpdateLiveIns) MRI.invalidateLiveness(); // Fix CFG. The later algorithms expect it to be right. @@ -249,10 +245,8 @@ // See if any jump tables have become dead as the code generator // did its thing. MachineJumpTableInfo *JTI = MF.getJumpTableInfo(); - if (!JTI) { - delete RS; + if (!JTI) return MadeChange; - } // Walk the function to find jump tables that are live. BitVector JTIsLive(JTI->getJumpTables().size()); @@ -274,7 +268,6 @@ MadeChange = true; } - delete RS; return MadeChange; } @@ -406,15 +399,27 @@ return TailLen; } -void BranchFolder::MaintainLiveIns(MachineBasicBlock *CurMBB, - MachineBasicBlock *NewMBB) { - if (RS) { - RS->enterBasicBlock(*CurMBB); - if (!CurMBB->empty()) - RS->forward(std::prev(CurMBB->end())); - for (unsigned int i = 1, e = TRI->getNumRegs(); i != e; i++) - if (RS->isRegUsed(i, false)) - NewMBB->addLiveIn(i); +void BranchFolder::computeLiveIns(MachineBasicBlock &MBB) { + if (!UpdateLiveIns) + return; + + LiveRegs.init(TRI); + LiveRegs.addLiveOutsNoPristines(MBB); + for (MachineInstr &MI : make_range(MBB.rbegin(), MBB.rend())) + LiveRegs.stepBackward(MI); + + for (unsigned Reg : LiveRegs) { + // Skip the register if we are about to add one of its super registers. + bool ContainsSuperReg = false; + for (MCSuperRegIterator SReg(Reg, TRI); SReg.isValid(); ++SReg) { + if (LiveRegs.contains(*SReg)) { + ContainsSuperReg = true; + break; + } + } + if (ContainsSuperReg) + continue; + MBB.addLiveIn(Reg); } } @@ -422,12 +427,9 @@ /// after it, replacing it with an unconditional branch to NewDest. void BranchFolder::ReplaceTailWithBranchTo(MachineBasicBlock::iterator OldInst, MachineBasicBlock *NewDest) { - MachineBasicBlock *CurMBB = OldInst->getParent(); - TII->ReplaceTailWithBranchTo(OldInst, NewDest); - // For targets that use the register scavenger, we must maintain LiveIns. - MaintainLiveIns(CurMBB, NewDest); + computeLiveIns(*NewDest); ++NumTailMerge; } @@ -465,8 +467,7 @@ // NewMBB inherits CurMBB's block frequency. MBBFreqInfo.setBlockFreq(NewMBB, MBBFreqInfo.getBlockFreq(&CurMBB)); - // For targets that use the register scavenger, we must maintain LiveIns. - MaintainLiveIns(&CurMBB, NewMBB); + computeLiveIns(*NewMBB); // Add the new block to the funclet. const auto &FuncletI = FuncletMembership.find(&CurMBB);