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Differential D21466

[mips] Don't derive the default ABI from the CPU in the backend.
ClosedPublic

Authored by dsanders on Jun 17 2016, 5:32 AM.

Details

Reviewers
sdardis
• rafael
Commits
rGde393329b934: [mips] Don't derive the default ABI from the CPU in the backend.
rL273557: [mips] Don't derive the default ABI from the CPU in the backend.
Summary

The backend has no reason to behave like a driver and should generally do
as it's told (and error out if it can't) instead of trying to figure out
what the API user meant. The default ABI is still derived from the arch
component as a concession to backwards compatibility.

API-users that previously passed an explicit CPU and a triple that was
inconsistent with the CPU (e.g. mips-linux-gnu and mips64r2) may get a
different ABI to what they got before. However, it's expected that there
are no such users on the basis that CodeGen has been asserting that the
triple is consistent with the selected ABI for several releases. API-users
that were consistent or passed '' or 'generic' as the CPU will see no
difference.

Depends on D21465

Diff Detail

Event Timeline

dsanders updated this revision to Diff 61080.Jun 17 2016, 5:32 AM
dsanders retitled this revision from to [mips] Don't derive the default ABI from the CPU in the backend..
dsanders updated this object.
dsanders added a reviewer: sdardis.
dsanders added a parent revision: D21465: [llc+llvm-mc] Replace the hidden -target-abi option with a -mabi thats visible in --help..
dsanders added a subscriber: llvm-commits.
Herald added subscribers: sdardis, dsanders. · View Herald TranscriptJun 17 2016, 5:32 AM
dsanders added a child revision: D21467: [llc+llvm-mc] Prefer applying -mabi to the triple where possible and allow Mips to take ABI information in the triple..Jun 17 2016, 5:57 AM
dsanders mentioned this in D20916: [WIP][mips] Allow explicit ABI's in MIPS triples within LLVM..Jun 17 2016, 5:58 AM
• rafael accepted this revision.Jun 17 2016, 7:18 AM
• rafael added a reviewer: • rafael.
• rafael added a subscriber: • rafael.

LGTM using -target-abi= or if the other review gets accepted too.

This revision is now accepted and ready to land.Jun 17 2016, 7:18 AM
dsanders updated this revision to Diff 61666.Jun 23 2016, 5:30 AM
dsanders edited edge metadata.

Extract this patch from the series it was a part of by changing -mabi to
-target-abi. It's now possible to commit this patch without committing the
dependencies first.

dsanders closed this revision.Jun 23 2016, 5:49 AM

Revision Contents

PathSize
lib/
Target/
Mips/
MCTargetDesc/
31 lines
test/
CodeGen/
Mips/
Fast-ISel/
12 lines
12 lines
compactbranches/
2 lines
12 lines
2 lines
2 lines
llvm-ir/
2 lines
2 lines
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2 lines
6 lines
2 lines
mips64r6/
4 lines
8 lines
MC/
Mips/
22 lines
mips64/
4 lines
mips64r2/
2 lines
4 lines
mips64r3/
2 lines
4 lines
mips64r5/
2 lines
4 lines
2 lines
2 lines
2 lines

Diff 61666

lib/Target/Mips/MCTargetDesc/MipsABIInfo.cpp

Show First 20 Lines • Show All 52 Lines • ▼ Show 20 Lines if (Options.getABIName().startswith("o32"))
return MipsABIInfo::O32(); return MipsABIInfo::O32();
else if (Options.getABIName().startswith("n32")) else if (Options.getABIName().startswith("n32"))
return MipsABIInfo::N32(); return MipsABIInfo::N32();
else if (Options.getABIName().startswith("n64")) else if (Options.getABIName().startswith("n64"))
return MipsABIInfo::N64(); return MipsABIInfo::N64();
else if (!Options.getABIName().empty()) else if (!Options.getABIName().empty())
llvm_unreachable("Unknown ABI option for MIPS"); llvm_unreachable("Unknown ABI option for MIPS");
// FIXME: This shares code with the selectMipsCPU routine that's if (TT.getArch() == Triple::mips64 || TT.getArch() == Triple::mips64el)
// used and not shared in a couple of other places. This needs unifying return MipsABIInfo::N64();
// at some level. return MipsABIInfo::O32();
if (CPU.empty() || CPU == "generic") {
if (TT.getArch() == Triple::mips || TT.getArch() == Triple::mipsel)
CPU = "mips32";
else
CPU = "mips64";
}
return StringSwitch<MipsABIInfo>(CPU)
.Case("mips1", MipsABIInfo::O32())
.Case("mips2", MipsABIInfo::O32())
.Case("mips32", MipsABIInfo::O32())
.Case("mips32r2", MipsABIInfo::O32())
.Case("mips32r3", MipsABIInfo::O32())
.Case("mips32r5", MipsABIInfo::O32())
.Case("mips32r6", MipsABIInfo::O32())
.Case("mips3", MipsABIInfo::N64())
.Case("mips4", MipsABIInfo::N64())
.Case("mips5", MipsABIInfo::N64())
.Case("mips64", MipsABIInfo::N64())
.Case("mips64r2", MipsABIInfo::N64())
.Case("mips64r3", MipsABIInfo::N64())
.Case("mips64r5", MipsABIInfo::N64())
.Case("mips64r6", MipsABIInfo::N64())
.Case("octeon", MipsABIInfo::N64())
.Default(MipsABIInfo::Unknown());
} }
unsigned MipsABIInfo::GetStackPtr() const { unsigned MipsABIInfo::GetStackPtr() const {
return ArePtrs64bit() ? Mips::SP_64 : Mips::SP; return ArePtrs64bit() ? Mips::SP_64 : Mips::SP;
} }
unsigned MipsABIInfo::GetFramePtr() const { unsigned MipsABIInfo::GetFramePtr() const {
return ArePtrs64bit() ? Mips::FP_64 : Mips::FP; return ArePtrs64bit() ? Mips::FP_64 : Mips::FP;
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test/CodeGen/Mips/Fast-ISel/check-disabled-mcpus.ll

; RUN: llc -march=mips -mcpu=mips2 -O0 -relocation-model=pic \ ; RUN: llc -march=mips -mcpu=mips2 -O0 -relocation-model=pic \
; RUN: -fast-isel-verbose <%s 2>&1 | FileCheck %s ; RUN: -fast-isel-verbose <%s 2>&1 | FileCheck %s
; RUN: llc -march=mips -mcpu=mips3 -O0 -relocation-model=pic \ ; RUN: llc -march=mips -mcpu=mips3 -O0 -relocation-model=pic -target-abi n64 \
; RUN: -fast-isel-verbose <%s 2>&1 | FileCheck %s ; RUN: -fast-isel-verbose <%s 2>&1 | FileCheck %s
; RUN: llc -march=mips -mcpu=mips4 -O0 -relocation-model=pic \ ; RUN: llc -march=mips -mcpu=mips4 -O0 -relocation-model=pic -target-abi n64 \
; RUN: -fast-isel-verbose <%s 2>&1 | FileCheck %s ; RUN: -fast-isel-verbose <%s 2>&1 | FileCheck %s
; RUN: llc -march=mips -mcpu=mips32r6 -O0 -relocation-model=pic \ ; RUN: llc -march=mips -mcpu=mips32r6 -O0 -relocation-model=pic \
; RUN: -fast-isel-verbose <%s 2>&1 | FileCheck %s ; RUN: -fast-isel-verbose <%s 2>&1 | FileCheck %s
; RUN: llc -march=mips -mcpu=mips32r2 -mattr=+micromips -O0 -relocation-model=pic \ ; RUN: llc -march=mips -mcpu=mips32r2 -mattr=+micromips -O0 -relocation-model=pic \
; RUN: -fast-isel-verbose <%s 2>&1 | FileCheck %s ; RUN: -fast-isel-verbose <%s 2>&1 | FileCheck %s
; RUN: llc -march=mips -mcpu=mips64 -O0 -relocation-model=pic \ ; RUN: llc -march=mips -mcpu=mips64 -O0 -relocation-model=pic -target-abi n64 \
; RUN: -fast-isel-verbose <%s 2>&1 | FileCheck %s ; RUN: -fast-isel-verbose <%s 2>&1 | FileCheck %s
; RUN: llc -march=mips -mcpu=mips64r2 -O0 -relocation-model=pic \ ; RUN: llc -march=mips -mcpu=mips64r2 -O0 -relocation-model=pic -target-abi n64 \
; RUN: -fast-isel-verbose <%s 2>&1 | FileCheck %s ; RUN: -fast-isel-verbose <%s 2>&1 | FileCheck %s
; RUN: llc -march=mips -mcpu=mips64r3 -O0 -relocation-model=pic \ ; RUN: llc -march=mips -mcpu=mips64r3 -O0 -relocation-model=pic -target-abi n64 \
; RUN: -fast-isel-verbose <%s 2>&1 | FileCheck %s ; RUN: -fast-isel-verbose <%s 2>&1 | FileCheck %s
; RUN: llc -march=mips -mcpu=mips64r5 -O0 -relocation-model=pic \ ; RUN: llc -march=mips -mcpu=mips64r5 -O0 -relocation-model=pic -target-abi n64 \
; RUN: -fast-isel-verbose <%s 2>&1 | FileCheck %s ; RUN: -fast-isel-verbose <%s 2>&1 | FileCheck %s
; RUN: llc -march=mips -mcpu=mips32r6 -O0 -relocation-model=pic \ ; RUN: llc -march=mips -mcpu=mips32r6 -O0 -relocation-model=pic \
; RUN: -fast-isel-verbose <%s 2>&1 | FileCheck %s ; RUN: -fast-isel-verbose <%s 2>&1 | FileCheck %s
; CHECK: FastISel missed terminator: ret i32 0 ; CHECK: FastISel missed terminator: ret i32 0
define i32 @foo() { define i32 @foo() {
entry: entry:
ret i32 0 ret i32 0
} }

test/CodeGen/Mips/adjust-callstack-sp.ll

; RUN: llc < %s -march=mips -mattr=mips16 | FileCheck %s -check-prefix=M16 ; RUN: llc < %s -march=mips -mattr=mips16 | FileCheck %s -check-prefix=M16
; RUN: llc < %s -march=mips -mcpu=mips2 | FileCheck %s -check-prefix=GP32 ; RUN: llc < %s -march=mips -mcpu=mips2 | FileCheck %s -check-prefix=GP32
; RUN: llc < %s -march=mips -mcpu=mips32 | FileCheck %s -check-prefix=GP32 ; RUN: llc < %s -march=mips -mcpu=mips32 | FileCheck %s -check-prefix=GP32
; RUN: llc < %s -march=mips -mcpu=mips32r6 | FileCheck %s -check-prefix=GP32 ; RUN: llc < %s -march=mips -mcpu=mips32r6 | FileCheck %s -check-prefix=GP32
; RUN: llc < %s -march=mips -mcpu=mips3 | FileCheck %s -check-prefix=GP64 ; RUN: llc < %s -march=mips -mcpu=mips3 -target-abi n64 | FileCheck %s -check-prefix=GP64
; RUN: llc < %s -march=mips -mcpu=mips64 | FileCheck %s -check-prefix=GP64 ; RUN: llc < %s -march=mips -mcpu=mips64 -target-abi n64 | FileCheck %s -check-prefix=GP64
; RUN: llc < %s -march=mips -mcpu=mips64r6 | FileCheck %s -check-prefix=GP64 ; RUN: llc < %s -march=mips -mcpu=mips64r6 -target-abi n64 | FileCheck %s -check-prefix=GP64
declare void @bar(i32*) declare void @bar(i32*)
define void @foo(i32 %sz) { define void @foo(i32 %sz) {
; ALL-LABEL: foo: ; ALL-LABEL: foo:
; M16-NOT: addiu $sp, 0 # 16 bit inst ; M16-NOT: addiu $sp, 0 # 16 bit inst
; GP32-NOT: addiu $sp, $sp, 0 ; GP32-NOT: addiu $sp, $sp, 0
; GP64-NOT: daddiu $sp, $sp, 0 ; GP64-NOT: daddiu $sp, $sp, 0
%a = alloca i32, i32 %sz %a = alloca i32, i32 %sz
call void @bar(i32* %a) call void @bar(i32* %a)
ret void ret void
} }

test/CodeGen/Mips/compactbranches/compact-branches.ll

; RUN: llc -march=mipsel -mcpu=mips32r6 -relocation-model=static -disable-mips-delay-filler < %s | FileCheck %s -check-prefix=STATIC32 ; RUN: llc -march=mipsel -mcpu=mips32r6 -relocation-model=static -disable-mips-delay-filler < %s | FileCheck %s -check-prefix=STATIC32
; RUN: llc -march=mipsel -mcpu=mips64r6 -disable-mips-delay-filler < %s | FileCheck %s -check-prefix=PIC ; RUN: llc -march=mipsel -mcpu=mips64r6 -target-abi n64 -disable-mips-delay-filler < %s | FileCheck %s -check-prefix=PIC
; Function Attrs: nounwind ; Function Attrs: nounwind
define void @l() { define void @l() {
entry: entry:
; PIC: jalrc $25 ; PIC: jalrc $25
%call = tail call i32 @k() %call = tail call i32 @k()
; PIC: jalrc $25 ; PIC: jalrc $25
%call1 = tail call i32 @j() %call1 = tail call i32 @j()
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test/CodeGen/Mips/elf_eflags.ll

Show All 17 Lines
; RUN: llc -mtriple mipsel-unknown-linux -mcpu=mips32 -relocation-model=static %s -o - | FileCheck -check-prefix=CHECK-LE32 %s ; RUN: llc -mtriple mipsel-unknown-linux -mcpu=mips32 -relocation-model=static %s -o - | FileCheck -check-prefix=CHECK-LE32 %s
; RUN: llc -mtriple mipsel-unknown-linux -mcpu=mips32 %s -o - | FileCheck -check-prefix=CHECK-LE32_PIC %s ; RUN: llc -mtriple mipsel-unknown-linux -mcpu=mips32 %s -o - | FileCheck -check-prefix=CHECK-LE32_PIC %s
; RUN: llc -mtriple mipsel-unknown-linux -mcpu=mips32r2 -relocation-model=static %s -o - | FileCheck -check-prefix=CHECK-LE32R2 %s ; RUN: llc -mtriple mipsel-unknown-linux -mcpu=mips32r2 -relocation-model=static %s -o - | FileCheck -check-prefix=CHECK-LE32R2 %s
; RUN: llc -mtriple mipsel-unknown-linux -mcpu=mips32r2 %s -o - | FileCheck -check-prefix=CHECK-LE32R2_PIC %s ; RUN: llc -mtriple mipsel-unknown-linux -mcpu=mips32r2 %s -o - | FileCheck -check-prefix=CHECK-LE32R2_PIC %s
; RUN: llc -mtriple mipsel-unknown-linux -mcpu=mips32r2 -mattr=+micromips -relocation-model=static %s -o - | FileCheck -check-prefix=CHECK-LE32R2-MICROMIPS %s ; RUN: llc -mtriple mipsel-unknown-linux -mcpu=mips32r2 -mattr=+micromips -relocation-model=static %s -o - | FileCheck -check-prefix=CHECK-LE32R2-MICROMIPS %s
; RUN: llc -mtriple mipsel-unknown-linux -mcpu=mips32r2 -mattr=+micromips %s -o - | FileCheck -check-prefix=CHECK-LE32R2-MICROMIPS_PIC %s ; RUN: llc -mtriple mipsel-unknown-linux -mcpu=mips32r2 -mattr=+micromips %s -o - | FileCheck -check-prefix=CHECK-LE32R2-MICROMIPS_PIC %s
; RUN: llc -mtriple mipsel-unknown-linux -mcpu=mips4 -relocation-model=static %s -o - | FileCheck -check-prefix=CHECK-LE64 %s ; RUN: llc -mtriple mipsel-unknown-linux -mcpu=mips4 -target-abi n64 -relocation-model=static %s -o - | FileCheck -check-prefix=CHECK-LE64 %s
; RUN: llc -mtriple mipsel-unknown-linux -mcpu=mips4 %s -o - | FileCheck -check-prefix=CHECK-LE64_PIC %s ; RUN: llc -mtriple mipsel-unknown-linux -mcpu=mips4 -target-abi n64 %s -o - | FileCheck -check-prefix=CHECK-LE64_PIC %s
; RUN: llc -mtriple mipsel-unknown-linux -mcpu=mips64 -relocation-model=static %s -o - | FileCheck -check-prefix=CHECK-LE64 %s ; RUN: llc -mtriple mipsel-unknown-linux -mcpu=mips64 -target-abi n64 -relocation-model=static %s -o - | FileCheck -check-prefix=CHECK-LE64 %s
; RUN: llc -mtriple mipsel-unknown-linux -mcpu=mips64 %s -o - | FileCheck -check-prefix=CHECK-LE64_PIC %s ; RUN: llc -mtriple mipsel-unknown-linux -mcpu=mips64 -target-abi n64 %s -o - | FileCheck -check-prefix=CHECK-LE64_PIC %s
; RUN: llc -mtriple mipsel-unknown-linux -mcpu=mips64r2 -relocation-model=static %s -o - | FileCheck -check-prefix=CHECK-LE64R2 %s ; RUN: llc -mtriple mipsel-unknown-linux -mcpu=mips64r2 -target-abi n64 -relocation-model=static %s -o - | FileCheck -check-prefix=CHECK-LE64R2 %s
; RUN: llc -mtriple mipsel-unknown-linux -mcpu=mips64r2 %s -o - | FileCheck -check-prefix=CHECK-LE64R2_PIC %s ; RUN: llc -mtriple mipsel-unknown-linux -mcpu=mips64r2 -target-abi n64 %s -o - | FileCheck -check-prefix=CHECK-LE64R2_PIC %s
; RUN: llc -mtriple mipsel-unknown-linux -mcpu=mips32r2 -mattr=+mips16 -relocation-model=pic %s -o - | FileCheck -check-prefix=CHECK-LE32R2-MIPS16 %s ; RUN: llc -mtriple mipsel-unknown-linux -mcpu=mips32r2 -mattr=+mips16 -relocation-model=pic %s -o - | FileCheck -check-prefix=CHECK-LE32R2-MIPS16 %s
; 32(R1) bit with NO_REORDER and static ; 32(R1) bit with NO_REORDER and static
; CHECK-LE32: .abicalls ; CHECK-LE32: .abicalls
; CHECK-LE32: .option pic0 ; CHECK-LE32: .option pic0
; CHECK-LE32: .set noreorder ; CHECK-LE32: .set noreorder
; ;
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test/CodeGen/Mips/fcmp.ll

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; RUN: FileCheck %s -check-prefix=ALL -check-prefix=64-C ; RUN: FileCheck %s -check-prefix=ALL -check-prefix=64-C
; RUN: llc < %s -march=mips64 -mcpu=mips64r6 | \ ; RUN: llc < %s -march=mips64 -mcpu=mips64r6 | \
; RUN: FileCheck %s -check-prefix=ALL -check-prefix=64-CMP ; RUN: FileCheck %s -check-prefix=ALL -check-prefix=64-CMP
; RUN: llc < %s -march=mips -mcpu=mips32r3 -mattr=+micromips | FileCheck %s \ ; RUN: llc < %s -march=mips -mcpu=mips32r3 -mattr=+micromips | FileCheck %s \
; RUN: -check-prefix=ALL -check-prefix=MM -check-prefix=MM32R3 ; RUN: -check-prefix=ALL -check-prefix=MM -check-prefix=MM32R3
; RUN: llc < %s -march=mips -mcpu=mips32r6 -mattr=+micromips | FileCheck %s \ ; RUN: llc < %s -march=mips -mcpu=mips32r6 -mattr=+micromips | FileCheck %s \
; RUN: -check-prefix=ALL -check-prefix=MM -check-prefix=MMR6 \ ; RUN: -check-prefix=ALL -check-prefix=MM -check-prefix=MMR6 \
; RUN: -check-prefix=MM32R6 ; RUN: -check-prefix=MM32R6
; RUN: llc < %s -march=mips -mcpu=mips64r6 -mattr=+micromips | FileCheck %s \ ; RUN: llc < %s -march=mips64 -mcpu=mips64r6 -mattr=+micromips | FileCheck %s \
; RUN: -check-prefix=ALL -check-prefix=MM -check-prefix=MMR6 \ ; RUN: -check-prefix=ALL -check-prefix=MM -check-prefix=MMR6 \
; RUN: -check-prefix=MM64R6 ; RUN: -check-prefix=MM64R6
define i32 @false_f32(float %a, float %b) nounwind { define i32 @false_f32(float %a, float %b) nounwind {
; ALL-LABEL: false_f32: ; ALL-LABEL: false_f32:
; 32-C: addiu $2, $zero, 0 ; 32-C: addiu $2, $zero, 0
; 32-CMP: addiu $2, $zero, 0 ; 32-CMP: addiu $2, $zero, 0
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test/CodeGen/Mips/interrupt-attr-64-error.ll

; RUN: not llc -mcpu=mips64r6 -march=mipsel -relocation-model=static < %s 2>%t ; RUN: not llc -mcpu=mips64r6 -march=mipsel -target-abi n64 -relocation-model=static < %s 2>%t
; RUN: FileCheck %s < %t ; RUN: FileCheck %s < %t
; CHECK: LLVM ERROR: "interrupt" attribute is only supported for the O32 ABI on MIPS32R2+ at the present time. ; CHECK: LLVM ERROR: "interrupt" attribute is only supported for the O32 ABI on MIPS32R2+ at the present time.
define i32 @isr_sw0() #0 { define i32 @isr_sw0() #0 {
ret i32 0 ret i32 0
} }
attributes #0 = { "interrupt"="sw0" } attributes #0 = { "interrupt"="sw0" }

test/CodeGen/Mips/llvm-ir/add.ll

Show All 22 Lines
; RUN: llc < %s -march=mips64 -mcpu=mips64r5 | FileCheck %s \ ; RUN: llc < %s -march=mips64 -mcpu=mips64r5 | FileCheck %s \
; RUN: -check-prefix=ALL -check-prefix=R2-R6 -check-prefix=GP64 ; RUN: -check-prefix=ALL -check-prefix=R2-R6 -check-prefix=GP64
; RUN: llc < %s -march=mips64 -mcpu=mips64r6 | FileCheck %s \ ; RUN: llc < %s -march=mips64 -mcpu=mips64r6 | FileCheck %s \
; RUN: -check-prefix=ALL -check-prefix=R2-R6 -check-prefix=GP64 ; RUN: -check-prefix=ALL -check-prefix=R2-R6 -check-prefix=GP64
; RUN: llc < %s -march=mips -mcpu=mips32r3 -mattr=+micromips -O2 | FileCheck %s \ ; RUN: llc < %s -march=mips -mcpu=mips32r3 -mattr=+micromips -O2 | FileCheck %s \
; RUN: -check-prefix=ALL -check-prefix=MMR6 -check-prefix=MM32 ; RUN: -check-prefix=ALL -check-prefix=MMR6 -check-prefix=MM32
; RUN: llc < %s -march=mips -mcpu=mips32r6 -mattr=+micromips -O2 | FileCheck %s \ ; RUN: llc < %s -march=mips -mcpu=mips32r6 -mattr=+micromips -O2 | FileCheck %s \
; RUN: -check-prefix=ALL -check-prefix=MMR6 -check-prefix=MM32 ; RUN: -check-prefix=ALL -check-prefix=MMR6 -check-prefix=MM32
; RUN: llc < %s -march=mips -mcpu=mips64r6 -mattr=+micromips -O2 | FileCheck %s \ ; RUN: llc < %s -march=mips -mcpu=mips64r6 -target-abi n64 -mattr=+micromips -O2 | FileCheck %s \
; RUN: -check-prefix=ALL -check-prefix=MMR6 -check-prefix=MM64 ; RUN: -check-prefix=ALL -check-prefix=MMR6 -check-prefix=MM64
define signext i1 @add_i1(i1 signext %a, i1 signext %b) { define signext i1 @add_i1(i1 signext %a, i1 signext %b) {
entry: entry:
; ALL-LABEL: add_i1: ; ALL-LABEL: add_i1:
; NOT-R2-R6: addu $[[T0:[0-9]+]], $4, $5 ; NOT-R2-R6: addu $[[T0:[0-9]+]], $4, $5
; NOT-R2-R6: sll $[[T0]], $[[T0]], 31 ; NOT-R2-R6: sll $[[T0]], $[[T0]], 31
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test/CodeGen/Mips/llvm-ir/and.ll

Show All 22 Lines
; RUN: llc < %s -march=mips64 -mcpu=mips64r5 | FileCheck %s \ ; RUN: llc < %s -march=mips64 -mcpu=mips64r5 | FileCheck %s \
; RUN: -check-prefix=ALL -check-prefix=GP64 ; RUN: -check-prefix=ALL -check-prefix=GP64
; RUN: llc < %s -march=mips64 -mcpu=mips64r6 | FileCheck %s \ ; RUN: llc < %s -march=mips64 -mcpu=mips64r6 | FileCheck %s \
; RUN: -check-prefix=ALL -check-prefix=GP64 ; RUN: -check-prefix=ALL -check-prefix=GP64
; RUN: llc < %s -march=mips -mcpu=mips32r3 -mattr=+micromips | FileCheck %s \ ; RUN: llc < %s -march=mips -mcpu=mips32r3 -mattr=+micromips | FileCheck %s \
; RUN: -check-prefix=ALL -check-prefix=MM -check-prefix=MM32 ; RUN: -check-prefix=ALL -check-prefix=MM -check-prefix=MM32
; RUN: llc < %s -march=mips -mcpu=mips32r6 -mattr=+micromips | FileCheck %s \ ; RUN: llc < %s -march=mips -mcpu=mips32r6 -mattr=+micromips | FileCheck %s \
; RUN: -check-prefix=ALL -check-prefix=MM -check-prefix=MM32 ; RUN: -check-prefix=ALL -check-prefix=MM -check-prefix=MM32
; RUN: llc < %s -march=mips -mcpu=mips64r6 -mattr=+micromips | FileCheck %s \ ; RUN: llc < %s -march=mips -mcpu=mips64r6 -target-abi n64 -mattr=+micromips | FileCheck %s \
; RUN: -check-prefix=ALL -check-prefix=MM -check-prefix=MM64 ; RUN: -check-prefix=ALL -check-prefix=MM -check-prefix=MM64
define signext i1 @and_i1(i1 signext %a, i1 signext %b) { define signext i1 @and_i1(i1 signext %a, i1 signext %b) {
entry: entry:
; ALL-LABEL: and_i1: ; ALL-LABEL: and_i1:
; GP32: and $2, $4, $5 ; GP32: and $2, $4, $5
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test/CodeGen/Mips/llvm-ir/lh_lhu.ll

; RUN: llc < %s -march=mips -mcpu=mips32r2 -mattr=+micromips -relocation-model=pic | FileCheck %s ; RUN: llc < %s -march=mips -mcpu=mips32r2 -mattr=+micromips -relocation-model=pic | FileCheck %s
; RUN: llc < %s -march=mips -mcpu=mips32r3 -mattr=+micromips -relocation-model=pic | FileCheck %s ; RUN: llc < %s -march=mips -mcpu=mips32r3 -mattr=+micromips -relocation-model=pic | FileCheck %s
; RUN: llc < %s -march=mips -mcpu=mips32r6 -mattr=+micromips -relocation-model=pic | FileCheck %s ; RUN: llc < %s -march=mips -mcpu=mips32r6 -mattr=+micromips -relocation-model=pic | FileCheck %s
; RUN: llc < %s -march=mips -mcpu=mips64r6 -mattr=+micromips -relocation-model=pic | FileCheck %s ; RUN: llc < %s -march=mips -mcpu=mips64r6 -target-abi n64 -mattr=+micromips -relocation-model=pic | FileCheck %s
@us = global i16 0, align 2 @us = global i16 0, align 2
define i32 @lhfunc() { define i32 @lhfunc() {
entry: entry:
; CHECK-LABEL: lhfunc ; CHECK-LABEL: lhfunc
; CHECK: lh $[[REG1:[0-9]+]], 0(${{[0-9]+}}) ; CHECK: lh $[[REG1:[0-9]+]], 0(${{[0-9]+}})
%0 = load i16, i16* @us, align 2 %0 = load i16, i16* @us, align 2
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test/CodeGen/Mips/llvm-ir/mul.ll

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; RUN: llc < %s -march=mips64 -mcpu=mips64r5 -relocation-model=pic | FileCheck %s -check-prefix=ALL \ ; RUN: llc < %s -march=mips64 -mcpu=mips64r5 -relocation-model=pic | FileCheck %s -check-prefix=ALL \
; RUN: -check-prefix=64R1-R5 -check-prefix=GP64 -check-prefix=GP64-NOT-R6 ; RUN: -check-prefix=64R1-R5 -check-prefix=GP64 -check-prefix=GP64-NOT-R6
; RUN: llc < %s -march=mips64 -mcpu=mips64r6 -relocation-model=pic | FileCheck %s -check-prefix=ALL \ ; RUN: llc < %s -march=mips64 -mcpu=mips64r6 -relocation-model=pic | FileCheck %s -check-prefix=ALL \
; RUN: -check-prefix=64R6 ; RUN: -check-prefix=64R6
; RUN: llc < %s -march=mips -mcpu=mips32r3 -mattr=+micromips -relocation-model=pic | FileCheck %s \ ; RUN: llc < %s -march=mips -mcpu=mips32r3 -mattr=+micromips -relocation-model=pic | FileCheck %s \
; RUN: -check-prefix=MM32 -check-prefix=MM32R3 ; RUN: -check-prefix=MM32 -check-prefix=MM32R3
; RUN: llc < %s -march=mips -mcpu=mips32r6 -mattr=+micromips -relocation-model=pic | FileCheck %s \ ; RUN: llc < %s -march=mips -mcpu=mips32r6 -mattr=+micromips -relocation-model=pic | FileCheck %s \
; RUN: -check-prefix=MM32 -check-prefix=MM32R6 ; RUN: -check-prefix=MM32 -check-prefix=MM32R6
; RUN: llc < %s -march=mips -mcpu=mips64r6 -mattr=+micromips -relocation-model=pic | FileCheck %s \ ; RUN: llc < %s -march=mips -mcpu=mips64r6 -mattr=+micromips -target-abi n64 -relocation-model=pic | FileCheck %s \
; RUN: -check-prefix=64R6 ; RUN: -check-prefix=64R6
define signext i1 @mul_i1(i1 signext %a, i1 signext %b) { define signext i1 @mul_i1(i1 signext %a, i1 signext %b) {
entry: entry:
; ALL-LABEL: mul_i1: ; ALL-LABEL: mul_i1:
; M2: mult $4, $5 ; M2: mult $4, $5
; M2: mflo $[[T0:[0-9]+]] ; M2: mflo $[[T0:[0-9]+]]
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test/CodeGen/Mips/llvm-ir/not.ll

Show All 22 Lines
; RUN: llc < %s -march=mips64 -mcpu=mips64r5 | FileCheck %s \ ; RUN: llc < %s -march=mips64 -mcpu=mips64r5 | FileCheck %s \
; RUN: -check-prefix=ALL -check-prefix=GP64 ; RUN: -check-prefix=ALL -check-prefix=GP64
; RUN: llc < %s -march=mips64 -mcpu=mips64r6 | FileCheck %s \ ; RUN: llc < %s -march=mips64 -mcpu=mips64r6 | FileCheck %s \
; RUN: -check-prefix=ALL -check-prefix=GP64 ; RUN: -check-prefix=ALL -check-prefix=GP64
; RUN: llc < %s -march=mips -mcpu=mips32r3 -mattr=+micromips | FileCheck %s \ ; RUN: llc < %s -march=mips -mcpu=mips32r3 -mattr=+micromips | FileCheck %s \
; RUN: -check-prefix=ALL -check-prefix=MM -check-prefix=MM32 ; RUN: -check-prefix=ALL -check-prefix=MM -check-prefix=MM32
; RUN: llc < %s -march=mips -mcpu=mips32r6 -mattr=+micromips | FileCheck %s \ ; RUN: llc < %s -march=mips -mcpu=mips32r6 -mattr=+micromips | FileCheck %s \
; RUN: -check-prefix=ALL -check-prefix=MM -check-prefix=MM32 ; RUN: -check-prefix=ALL -check-prefix=MM -check-prefix=MM32
; RUN: llc < %s -march=mips -mcpu=mips64r6 -mattr=+micromips | FileCheck %s \ ; RUN: llc < %s -march=mips -mcpu=mips64r6 -target-abi n64 -mattr=+micromips | FileCheck %s \
; RUN: -check-prefix=ALL -check-prefix=MM -check-prefix=MM64 ; RUN: -check-prefix=ALL -check-prefix=MM -check-prefix=MM64
define signext i1 @not_i1(i1 signext %a) { define signext i1 @not_i1(i1 signext %a) {
entry: entry:
; ALL-LABEL: not_i1: ; ALL-LABEL: not_i1:
; GP32: not $2, $4 ; GP32: not $2, $4
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test/CodeGen/Mips/llvm-ir/or.ll

Show All 22 Lines
; RUN: llc < %s -march=mips64 -mcpu=mips64r5 | FileCheck %s \ ; RUN: llc < %s -march=mips64 -mcpu=mips64r5 | FileCheck %s \
; RUN: -check-prefix=ALL -check-prefix=GP64 ; RUN: -check-prefix=ALL -check-prefix=GP64
; RUN: llc < %s -march=mips64 -mcpu=mips64r6 | FileCheck %s \ ; RUN: llc < %s -march=mips64 -mcpu=mips64r6 | FileCheck %s \
; RUN: -check-prefix=ALL -check-prefix=GP64 ; RUN: -check-prefix=ALL -check-prefix=GP64
; RUN: llc < %s -march=mips -mcpu=mips32r3 -mattr=+micromips | FileCheck %s \ ; RUN: llc < %s -march=mips -mcpu=mips32r3 -mattr=+micromips | FileCheck %s \
; RUN: -check-prefix=ALL -check-prefix=MM -check-prefix=MM32 ; RUN: -check-prefix=ALL -check-prefix=MM -check-prefix=MM32
; RUN: llc < %s -march=mips -mcpu=mips32r6 -mattr=+micromips | FileCheck %s \ ; RUN: llc < %s -march=mips -mcpu=mips32r6 -mattr=+micromips | FileCheck %s \
; RUN: -check-prefix=ALL -check-prefix=MM -check-prefix=MM32 ; RUN: -check-prefix=ALL -check-prefix=MM -check-prefix=MM32
; RUN: llc < %s -march=mips -mcpu=mips64r6 -mattr=+micromips | FileCheck %s \ ; RUN: llc < %s -march=mips -mcpu=mips64r6 -target-abi n64 -mattr=+micromips | FileCheck %s \
; RUN: -check-prefix=ALL -check-prefix=MM -check-prefix=MM64 ; RUN: -check-prefix=ALL -check-prefix=MM -check-prefix=MM64
define signext i1 @or_i1(i1 signext %a, i1 signext %b) { define signext i1 @or_i1(i1 signext %a, i1 signext %b) {
entry: entry:
; ALL-LABEL: or_i1: ; ALL-LABEL: or_i1:
; GP32: or $2, $4, $5 ; GP32: or $2, $4, $5
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test/CodeGen/Mips/llvm-ir/sdiv.ll

Show All 37 Lines
; RUN: llc < %s -march=mips64 -mcpu=mips64r6 -relocation-model=pic | FileCheck %s \ ; RUN: llc < %s -march=mips64 -mcpu=mips64r6 -relocation-model=pic | FileCheck %s \
; RUN: -check-prefix=ALL -check-prefix=R6 \ ; RUN: -check-prefix=ALL -check-prefix=R6 \
; RUN: -check-prefix=64R6 ; RUN: -check-prefix=64R6
; RUN: llc < %s -march=mips -mcpu=mips32r3 -mattr=+micromips -relocation-model=pic | FileCheck %s \ ; RUN: llc < %s -march=mips -mcpu=mips32r3 -mattr=+micromips -relocation-model=pic | FileCheck %s \
; RUN: -check-prefix=ALL -check-prefix=MMR3 -check-prefix=MM32 ; RUN: -check-prefix=ALL -check-prefix=MMR3 -check-prefix=MM32
; RUN: llc < %s -march=mips -mcpu=mips32r6 -mattr=+micromips -relocation-model=pic | FileCheck %s \ ; RUN: llc < %s -march=mips -mcpu=mips32r6 -mattr=+micromips -relocation-model=pic | FileCheck %s \
; RUN: -check-prefix=ALL -check-prefix=MMR6 -check-prefix=MM32 ; RUN: -check-prefix=ALL -check-prefix=MMR6 -check-prefix=MM32
; RUN: llc < %s -march=mips -mcpu=mips64r6 -mattr=+micromips -relocation-model=pic | FileCheck %s \ ; RUN: llc < %s -march=mips -mcpu=mips64r6 -mattr=+micromips -target-abi n64 -relocation-model=pic | FileCheck %s \
; RUN: -check-prefix=ALL -check-prefix=MMR6 -check-prefix=MM64 ; RUN: -check-prefix=ALL -check-prefix=MMR6 -check-prefix=MM64
define signext i1 @sdiv_i1(i1 signext %a, i1 signext %b) { define signext i1 @sdiv_i1(i1 signext %a, i1 signext %b) {
entry: entry:
; ALL-LABEL: sdiv_i1: ; ALL-LABEL: sdiv_i1:
; NOT-R6: div $zero, $4, $5 ; NOT-R6: div $zero, $4, $5
; NOT-R6: teq $5, $zero, 7 ; NOT-R6: teq $5, $zero, 7
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test/CodeGen/Mips/llvm-ir/srem.ll

Show All 37 Lines
; RUN: llc < %s -march=mips64 -mcpu=mips64r6 -relocation-model=pic | FileCheck %s \ ; RUN: llc < %s -march=mips64 -mcpu=mips64r6 -relocation-model=pic | FileCheck %s \
; RUN: -check-prefix=ALL -check-prefix=64R6 \ ; RUN: -check-prefix=ALL -check-prefix=64R6 \
; RUN: -check-prefix=R6 -check-prefix=R2-R6 ; RUN: -check-prefix=R6 -check-prefix=R2-R6
; RUN: llc < %s -march=mips -mcpu=mips32r3 -mattr=+micromips -relocation-model=pic | FileCheck %s \ ; RUN: llc < %s -march=mips -mcpu=mips32r3 -mattr=+micromips -relocation-model=pic | FileCheck %s \
; RUN: -check-prefix=ALL -check-prefix=MMR3 -check-prefix=MM32 ; RUN: -check-prefix=ALL -check-prefix=MMR3 -check-prefix=MM32
; RUN: llc < %s -march=mips -mcpu=mips32r6 -mattr=+micromips -relocation-model=pic | FileCheck %s \ ; RUN: llc < %s -march=mips -mcpu=mips32r6 -mattr=+micromips -relocation-model=pic | FileCheck %s \
; RUN: -check-prefix=ALL -check-prefix=MMR6 -check-prefix=MM32 ; RUN: -check-prefix=ALL -check-prefix=MMR6 -check-prefix=MM32
; RUN: llc < %s -march=mips -mcpu=mips64r6 -mattr=+micromips -relocation-model=pic | FileCheck %s \ ; RUN: llc < %s -march=mips -mcpu=mips64r6 -target-abi n64 -mattr=+micromips -relocation-model=pic | FileCheck %s \
; RUN: -check-prefix=ALL -check-prefix=MMR6 -check-prefix=MM64 ; RUN: -check-prefix=ALL -check-prefix=MMR6 -check-prefix=MM64
define signext i1 @srem_i1(i1 signext %a, i1 signext %b) { define signext i1 @srem_i1(i1 signext %a, i1 signext %b) {
entry: entry:
; ALL-LABEL: srem_i1: ; ALL-LABEL: srem_i1:
; NOT-R6: div $zero, $4, $5 ; NOT-R6: div $zero, $4, $5
; NOT-R6: teq $5, $zero, 7 ; NOT-R6: teq $5, $zero, 7
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test/CodeGen/Mips/llvm-ir/udiv.ll

Show All 24 Lines
; RUN: -check-prefix=ALL -check-prefix=NOT-R6 -check-prefix=GP64-NOT-R6 ; RUN: -check-prefix=ALL -check-prefix=NOT-R6 -check-prefix=GP64-NOT-R6
; RUN: llc < %s -march=mips64 -mcpu=mips64r6 -relocation-model=pic | FileCheck %s \ ; RUN: llc < %s -march=mips64 -mcpu=mips64r6 -relocation-model=pic | FileCheck %s \
; RUN: -check-prefix=ALL -check-prefix=R6 -check-prefix=64R6 ; RUN: -check-prefix=ALL -check-prefix=R6 -check-prefix=64R6
; RUN: llc < %s -march=mips -mcpu=mips32r3 -mattr=+micromips -relocation-model=pic | FileCheck %s \ ; RUN: llc < %s -march=mips -mcpu=mips32r3 -mattr=+micromips -relocation-model=pic | FileCheck %s \
; RUN: -check-prefix=ALL -check-prefix=MMR3 -check-prefix=MM32 ; RUN: -check-prefix=ALL -check-prefix=MMR3 -check-prefix=MM32
; RUN: llc < %s -march=mips -mcpu=mips32r6 -mattr=+micromips -relocation-model=pic | FileCheck %s \ ; RUN: llc < %s -march=mips -mcpu=mips32r6 -mattr=+micromips -relocation-model=pic | FileCheck %s \
; RUN: -check-prefix=ALL -check-prefix=MMR6 -check-prefix=MM32 ; RUN: -check-prefix=ALL -check-prefix=MMR6 -check-prefix=MM32
; RUN: llc < %s -march=mips -mcpu=mips64r6 -mattr=+micromips -relocation-model=pic | FileCheck %s \ ; RUN: llc < %s -march=mips -mcpu=mips64r6 -target-abi n64 -mattr=+micromips -relocation-model=pic | FileCheck %s \
; RUN: -check-prefix=ALL -check-prefix=MMR6 -check-prefix=MM64 ; RUN: -check-prefix=ALL -check-prefix=MMR6 -check-prefix=MM64
define zeroext i1 @udiv_i1(i1 zeroext %a, i1 zeroext %b) { define zeroext i1 @udiv_i1(i1 zeroext %a, i1 zeroext %b) {
entry: entry:
; ALL-LABEL: udiv_i1: ; ALL-LABEL: udiv_i1:
; NOT-R6: divu $zero, $4, $5 ; NOT-R6: divu $zero, $4, $5
; NOT-R6: teq $5, $zero, 7 ; NOT-R6: teq $5, $zero, 7
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test/CodeGen/Mips/llvm-ir/urem.ll

Show All 37 Lines
; RUN: llc < %s -march=mips64 -mcpu=mips64r6 -relocation-model=pic | FileCheck %s \ ; RUN: llc < %s -march=mips64 -mcpu=mips64r6 -relocation-model=pic | FileCheck %s \
; RUN: -check-prefix=ALL -check-prefix=64R6 \ ; RUN: -check-prefix=ALL -check-prefix=64R6 \
; RUN: -check-prefix=R6 -check-prefix=R2-R6 ; RUN: -check-prefix=R6 -check-prefix=R2-R6
; RUN: llc < %s -march=mips -mcpu=mips32r3 -mattr=+micromips -relocation-model=pic | FileCheck %s \ ; RUN: llc < %s -march=mips -mcpu=mips32r3 -mattr=+micromips -relocation-model=pic | FileCheck %s \
; RUN: -check-prefix=ALL -check-prefix=MMR3 -check-prefix=MM32 ; RUN: -check-prefix=ALL -check-prefix=MMR3 -check-prefix=MM32
; RUN: llc < %s -march=mips -mcpu=mips32r6 -mattr=+micromips -relocation-model=pic | FileCheck %s \ ; RUN: llc < %s -march=mips -mcpu=mips32r6 -mattr=+micromips -relocation-model=pic | FileCheck %s \
; RUN: -check-prefix=ALL -check-prefix=MMR6 -check-prefix=MM32 ; RUN: -check-prefix=ALL -check-prefix=MMR6 -check-prefix=MM32
; RUN: llc < %s -march=mips -mcpu=mips64r6 -mattr=+micromips -relocation-model=pic | FileCheck %s \ ; RUN: llc < %s -march=mips -mcpu=mips64r6 -target-abi n64 -mattr=+micromips -relocation-model=pic | FileCheck %s \
; RUN: -check-prefix=ALL -check-prefix=MMR6 -check-prefix=MM64 ; RUN: -check-prefix=ALL -check-prefix=MMR6 -check-prefix=MM64
define signext i1 @urem_i1(i1 signext %a, i1 signext %b) { define signext i1 @urem_i1(i1 signext %a, i1 signext %b) {
entry: entry:
; ALL-LABEL: urem_i1: ; ALL-LABEL: urem_i1:
; NOT-R6: andi $[[T0:[0-9]+]], $5, 1 ; NOT-R6: andi $[[T0:[0-9]+]], $5, 1
; NOT-R6: andi $[[T1:[0-9]+]], $4, 1 ; NOT-R6: andi $[[T1:[0-9]+]], $4, 1
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test/CodeGen/Mips/llvm-ir/xor.ll

Show All 22 Lines
; RUN: llc < %s -march=mips64 -mcpu=mips64r5 | FileCheck %s \ ; RUN: llc < %s -march=mips64 -mcpu=mips64r5 | FileCheck %s \
; RUN: -check-prefix=ALL -check-prefix=GP64 ; RUN: -check-prefix=ALL -check-prefix=GP64
; RUN: llc < %s -march=mips64 -mcpu=mips64r6 | FileCheck %s \ ; RUN: llc < %s -march=mips64 -mcpu=mips64r6 | FileCheck %s \
; RUN: -check-prefix=ALL -check-prefix=GP64 ; RUN: -check-prefix=ALL -check-prefix=GP64
; RUN: llc < %s -march=mips -mcpu=mips32r3 -mattr=+micromips | FileCheck %s \ ; RUN: llc < %s -march=mips -mcpu=mips32r3 -mattr=+micromips | FileCheck %s \
; RUN: -check-prefix=ALL -check-prefix=MM -check-prefix=MM32 ; RUN: -check-prefix=ALL -check-prefix=MM -check-prefix=MM32
; RUN: llc < %s -march=mips -mcpu=mips32r6 -mattr=+micromips | FileCheck %s \ ; RUN: llc < %s -march=mips -mcpu=mips32r6 -mattr=+micromips | FileCheck %s \
; RUN: -check-prefix=ALL -check-prefix=MM -check-prefix=MM32 ; RUN: -check-prefix=ALL -check-prefix=MM -check-prefix=MM32
; RUN: llc < %s -march=mips -mcpu=mips64r6 -mattr=+micromips | FileCheck %s \ ; RUN: llc < %s -march=mips -mcpu=mips64r6 -target-abi n64 -mattr=+micromips | FileCheck %s \
; RUN: -check-prefix=ALL -check-prefix=MM -check-prefix=MM64 ; RUN: -check-prefix=ALL -check-prefix=MM -check-prefix=MM64
define signext i1 @xor_i1(i1 signext %a, i1 signext %b) { define signext i1 @xor_i1(i1 signext %a, i1 signext %b) {
entry: entry:
; ALL-LABEL: xor_i1: ; ALL-LABEL: xor_i1:
; GP32: xor $2, $4, $5 ; GP32: xor $2, $4, $5
▲ Show 20 Lines • Show All 193 Lines • Show Last 20 Lines

test/CodeGen/Mips/madd-msub.ll

; RUN: llc -march=mips -mcpu=mips32 < %s | FileCheck %s -check-prefix=ALL -check-prefix=32 ; RUN: llc -march=mips -mcpu=mips32 < %s | FileCheck %s -check-prefix=ALL -check-prefix=32
; RUN: llc -march=mips -mcpu=mips32r2 < %s | FileCheck %s -check-prefix=ALL -check-prefix=32 ; RUN: llc -march=mips -mcpu=mips32r2 < %s | FileCheck %s -check-prefix=ALL -check-prefix=32
; RUN: llc -march=mips -mcpu=mips32r6 < %s | FileCheck %s -check-prefix=ALL -check-prefix=32R6 ; RUN: llc -march=mips -mcpu=mips32r6 < %s | FileCheck %s -check-prefix=ALL -check-prefix=32R6
; RUN: llc -march=mips -mcpu=mips32 -mattr=dsp < %s | FileCheck %s -check-prefix=DSP ; RUN: llc -march=mips -mcpu=mips32 -mattr=dsp < %s | FileCheck %s -check-prefix=DSP
; RUN: llc -march=mips -mcpu=mips64 < %s | FileCheck %s -check-prefix=ALL -check-prefix=64 ; RUN: llc -march=mips -mcpu=mips64 -target-abi n64 < %s | FileCheck %s -check-prefix=ALL -check-prefix=64
; RUN: llc -march=mips -mcpu=mips64r2 < %s | FileCheck %s -check-prefix=ALL -check-prefix=64 ; RUN: llc -march=mips -mcpu=mips64r2 -target-abi n64 < %s | FileCheck %s -check-prefix=ALL -check-prefix=64
; RUN: llc -march=mips -mcpu=mips64r6 < %s | FileCheck %s -check-prefix=ALL -check-prefix=64R6 ; RUN: llc -march=mips -mcpu=mips64r6 -target-abi n64 < %s | FileCheck %s -check-prefix=ALL -check-prefix=64R6
; FIXME: The MIPS16 test should check its output ; FIXME: The MIPS16 test should check its output
; RUN: llc -march=mips -mattr=mips16 < %s ; RUN: llc -march=mips -mattr=mips16 < %s
; ALL-LABEL: madd1: ; ALL-LABEL: madd1:
; 32-DAG: sra $[[T0:[0-9]+]], $6, 31 ; 32-DAG: sra $[[T0:[0-9]+]], $6, 31
; 32-DAG: mtlo $6 ; 32-DAG: mtlo $6
▲ Show 20 Lines • Show All 247 Lines • Show Last 20 Lines

test/CodeGen/Mips/mips64extins.ll

; RUN: llc < %s -march=mips64el -mcpu=mips64r2 -target-abi=n64 | FileCheck %s ; RUN: llc < %s -march=mips64el -mcpu=mips64r2 -target-abi=n64 | FileCheck %s
define i64 @dext(i64 %i) nounwind readnone { define i64 @dext(i64 %i) nounwind readnone {
entry: entry:
; CHECK-LABEL: dext: ; CHECK-LABEL: dext:
; CHECK: dext ${{[0-9]+}}, ${{[0-9]+}}, 5, 10 ; CHECK: dext ${{[0-9]+}}, ${{[0-9]+}}, 5, 10
%shr = lshr i64 %i, 5 %shr = lshr i64 %i, 5
%and = and i64 %shr, 1023 %and = and i64 %shr, 1023
ret i64 %and ret i64 %and
▲ Show 20 Lines • Show All 52 Lines • Show Last 20 Lines

test/CodeGen/Mips/mips64r6/compatibility.ll

; RUN: llc -march=mipsel -mcpu=mips64r6 < %s | FileCheck %s ; RUN: llc -march=mipsel -mcpu=mips64r6 -target-abi n64 < %s | FileCheck %s
; RUN: not llc -march=mipsel -mcpu=mips64r6 -mattr=+dsp < %s 2>&1 | FileCheck --check-prefix=DSP %s ; RUN: not llc -march=mipsel -mcpu=mips64r6 -target-abi n64 -mattr=+dsp < %s 2>&1 | FileCheck --check-prefix=DSP %s
; CHECK: foo: ; CHECK: foo:
; DSP: MIPS64r6 is not compatible with the DSP ASE ; DSP: MIPS64r6 is not compatible with the DSP ASE
define void @foo() nounwind { define void @foo() nounwind {
ret void ret void
} }

test/CodeGen/Mips/zeroreg.ll

; RUN: llc < %s -march=mipsel -mcpu=mips32 -relocation-model=pic | FileCheck %s -check-prefix=ALL -check-prefix=32-CMOV ; RUN: llc < %s -march=mipsel -mcpu=mips32 -relocation-model=pic | FileCheck %s -check-prefix=ALL -check-prefix=32-CMOV
; RUN: llc < %s -march=mipsel -mcpu=mips32r2 -relocation-model=pic | FileCheck %s -check-prefix=ALL -check-prefix=32-CMOV ; RUN: llc < %s -march=mipsel -mcpu=mips32r2 -relocation-model=pic | FileCheck %s -check-prefix=ALL -check-prefix=32-CMOV
; RUN: llc < %s -march=mipsel -mcpu=mips32r6 -relocation-model=pic | FileCheck %s -check-prefix=ALL -check-prefix=32R6 ; RUN: llc < %s -march=mipsel -mcpu=mips32r6 -relocation-model=pic | FileCheck %s -check-prefix=ALL -check-prefix=32R6
; RUN: llc < %s -march=mipsel -mcpu=mips4 -relocation-model=pic | FileCheck %s -check-prefix=ALL -check-prefix=64-CMOV ; RUN: llc < %s -march=mipsel -mcpu=mips4 -target-abi n64 -relocation-model=pic | FileCheck %s -check-prefix=ALL -check-prefix=64-CMOV
; RUN: llc < %s -march=mipsel -mcpu=mips64 -relocation-model=pic | FileCheck %s -check-prefix=ALL -check-prefix=64-CMOV ; RUN: llc < %s -march=mipsel -mcpu=mips64 -target-abi n64 -relocation-model=pic | FileCheck %s -check-prefix=ALL -check-prefix=64-CMOV
; RUN: llc < %s -march=mipsel -mcpu=mips64r2 -relocation-model=pic | FileCheck %s -check-prefix=ALL -check-prefix=64-CMOV ; RUN: llc < %s -march=mipsel -mcpu=mips64r2 -target-abi n64 -relocation-model=pic | FileCheck %s -check-prefix=ALL -check-prefix=64-CMOV
; RUN: llc < %s -march=mipsel -mcpu=mips64r6 -relocation-model=pic | FileCheck %s -check-prefix=ALL -check-prefix=64R6 ; RUN: llc < %s -march=mipsel -mcpu=mips64r6 -target-abi n64 -relocation-model=pic | FileCheck %s -check-prefix=ALL -check-prefix=64R6
@g1 = external global i32 @g1 = external global i32
define i32 @sel_icmp_nez_i32_z0(i32 signext %s) nounwind readonly { define i32 @sel_icmp_nez_i32_z0(i32 signext %s) nounwind readonly {
entry: entry:
; ALL-LABEL: sel_icmp_nez_i32_z0: ; ALL-LABEL: sel_icmp_nez_i32_z0:
; 32-CMOV: lw $2, 0(${{[0-9]+}}) ; 32-CMOV: lw $2, 0(${{[0-9]+}})
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test/MC/Mips/elf_eflags.s

# These *MUST* match the output of 'gcc -c' compiled with the same triple and # These *MUST* match the output of 'gcc -c' compiled with the same triple and
# corresponding options (-mcpu=mips32 -> -mips32 for example). # corresponding options (-mcpu=mips32 -> -mips32 for example).
# RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips64r6 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPSEL-MIPS64R6 %s # RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips64r6 -target-abi n64 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPSEL-MIPS64R6 %s
# MIPSEL-MIPS64R6: Flags [ (0xA0000406) # MIPSEL-MIPS64R6: Flags [ (0xA0000406)
# RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips64r6 -mattr=+nan2008 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPSEL-MIPS64R6-NAN2008 %s # RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips64r6 -target-abi n64 -mattr=+nan2008 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPSEL-MIPS64R6-NAN2008 %s
# MIPSEL-MIPS64R6-NAN2008: Flags [ (0xA0000406) # MIPSEL-MIPS64R6-NAN2008: Flags [ (0xA0000406)
# RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips64r2 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPSEL-MIPS64R2 %s # RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips64r2 -target-abi n64 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPSEL-MIPS64R2 %s
# RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips64r3 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPSEL-MIPS64R2 %s # RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips64r3 -target-abi n64 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPSEL-MIPS64R2 %s
# RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips64r5 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPSEL-MIPS64R2 %s # RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips64r5 -target-abi n64 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPSEL-MIPS64R2 %s
# MIPSEL-MIPS64R2: Flags [ (0x80000006) # MIPSEL-MIPS64R2: Flags [ (0x80000006)
# RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips64r2 -mattr=+nan2008 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPSEL-MIPS64R2-NAN2008 %s # RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips64r2 -target-abi n64 -mattr=+nan2008 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPSEL-MIPS64R2-NAN2008 %s
# RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips64r3 -mattr=+nan2008 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPSEL-MIPS64R2-NAN2008 %s # RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips64r3 -target-abi n64 -mattr=+nan2008 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPSEL-MIPS64R2-NAN2008 %s
# RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips64r5 -mattr=+nan2008 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPSEL-MIPS64R2-NAN2008 %s # RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips64r5 -target-abi n64 -mattr=+nan2008 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPSEL-MIPS64R2-NAN2008 %s
# MIPSEL-MIPS64R2-NAN2008: Flags [ (0x80000406) # MIPSEL-MIPS64R2-NAN2008: Flags [ (0x80000406)
# RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips64 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPSEL-MIPS64 %s # RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips64 -target-abi n64 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPSEL-MIPS64 %s
# MIPSEL-MIPS64: Flags [ (0x60000006) # MIPSEL-MIPS64: Flags [ (0x60000006)
# RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips64 -mattr=+nan2008 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPSEL-MIPS64-NAN2008 %s # RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips64 -target-abi n64 -mattr=+nan2008 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPSEL-MIPS64-NAN2008 %s
# MIPSEL-MIPS64-NAN2008: Flags [ (0x60000406) # MIPSEL-MIPS64-NAN2008: Flags [ (0x60000406)
# RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips32r6 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPSEL-MIPS32R6 %s # RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips32r6 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPSEL-MIPS32R6 %s
# MIPSEL-MIPS32R6: Flags [ (0x90001404) # MIPSEL-MIPS32R6: Flags [ (0x90001404)
# RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips32r6 -mattr=+nan2008 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPSEL-MIPS32R6-NAN2008 %s # RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips32r6 -mattr=+nan2008 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPSEL-MIPS32R6-NAN2008 %s
# MIPSEL-MIPS32R6-NAN2008: Flags [ (0x90001404) # MIPSEL-MIPS32R6-NAN2008: Flags [ (0x90001404)
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# Default ABI for MIPS64 is N64 as opposed to GCC/GAS (N32) # Default ABI for MIPS64 is N64 as opposed to GCC/GAS (N32)
# RUN: llvm-mc -filetype=obj -triple mips64el-unknown-linux -mcpu=mips64 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPS64EL-MIPS64 %s # RUN: llvm-mc -filetype=obj -triple mips64el-unknown-linux -mcpu=mips64 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPS64EL-MIPS64 %s
# MIPS64EL-MIPS64: Flags [ (0x60000006) # MIPS64EL-MIPS64: Flags [ (0x60000006)
# RUN: llvm-mc -filetype=obj -triple mips64el-unknown-linux -mcpu=mips64 -mattr=+nan2008 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPS64EL-MIPS64-NAN2008 %s # RUN: llvm-mc -filetype=obj -triple mips64el-unknown-linux -mcpu=mips64 -mattr=+nan2008 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPS64EL-MIPS64-NAN2008 %s
# MIPS64EL-MIPS64-NAN2008: Flags [ (0x60000406) # MIPS64EL-MIPS64-NAN2008: Flags [ (0x60000406)
# RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=octeon %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPSEL-OCTEON %s # RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=octeon -target-abi n64 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPSEL-OCTEON %s
# MIPSEL-OCTEON: Flags [ (0x808B0006) # MIPSEL-OCTEON: Flags [ (0x808B0006)

test/MC/Mips/mips64/abiflags.s

# RUN: llvm-mc %s -arch=mips -mcpu=mips64 | \ # RUN: llvm-mc %s -arch=mips -mcpu=mips64 -target-abi n64 | \
# RUN: FileCheck %s -check-prefix=CHECK-ASM # RUN: FileCheck %s -check-prefix=CHECK-ASM
# #
# RUN: llvm-mc %s -arch=mips -mcpu=mips64 -filetype=obj -o - | \ # RUN: llvm-mc %s -arch=mips -mcpu=mips64 -target-abi n64 -filetype=obj -o - | \
# RUN: llvm-readobj -sections -section-data -section-relocations - | \ # RUN: llvm-readobj -sections -section-data -section-relocations - | \
# RUN: FileCheck %s -check-prefix=CHECK-OBJ # RUN: FileCheck %s -check-prefix=CHECK-OBJ
# CHECK-ASM: .module fp=64 # CHECK-ASM: .module fp=64
# Checking if the Mips.abiflags were correctly emitted. # Checking if the Mips.abiflags were correctly emitted.
# CHECK-OBJ: Section { # CHECK-OBJ: Section {
# CHECK-OBJ: Index: 5 # CHECK-OBJ: Index: 5
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test/MC/Mips/mips64r2/abi-bad.s

# RUN: not llvm-mc %s -triple mips-unknown-linux -mcpu=mips64r2 2>&1 | FileCheck %s # RUN: not llvm-mc %s -triple mips-unknown-linux -mcpu=mips64r2 -target-abi n64 2>&1 | FileCheck %s
.set fp=xx .set fp=xx
# CHECK: error: '.set fp=xx' requires the O32 ABI # CHECK: error: '.set fp=xx' requires the O32 ABI
# CHECK: .set fp=xx # CHECK: .set fp=xx
# CHECK: ^ # CHECK: ^

test/MC/Mips/mips64r2/abiflags.s

# RUN: llvm-mc %s -arch=mips -mcpu=mips64r2 | \ # RUN: llvm-mc %s -arch=mips -mcpu=mips64r2 -target-abi n64 | \
# RUN: FileCheck %s -check-prefix=CHECK-ASM # RUN: FileCheck %s -check-prefix=CHECK-ASM
# #
# RUN: llvm-mc %s -arch=mips -mcpu=mips64r2 -filetype=obj -o - | \ # RUN: llvm-mc %s -arch=mips -mcpu=mips64r2 -target-abi n64 -filetype=obj -o - | \
# RUN: llvm-readobj -sections -section-data -section-relocations - | \ # RUN: llvm-readobj -sections -section-data -section-relocations - | \
# RUN: FileCheck %s -check-prefix=CHECK-OBJ # RUN: FileCheck %s -check-prefix=CHECK-OBJ
# CHECK-ASM: .module fp=64 # CHECK-ASM: .module fp=64
# Checking if the Mips.abiflags were correctly emitted. # Checking if the Mips.abiflags were correctly emitted.
# CHECK-OBJ: Section { # CHECK-OBJ: Section {
# CHECK-OBJ: Index: 5 # CHECK-OBJ: Index: 5
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test/MC/Mips/mips64r3/abi-bad.s

# RUN: not llvm-mc %s -triple mips-unknown-linux -mcpu=mips64r3 2>&1 | FileCheck %s # RUN: not llvm-mc %s -triple mips-unknown-linux -mcpu=mips64r3 -target-abi n64 2>&1 | FileCheck %s
.set fp=xx .set fp=xx
# CHECK: error: '.set fp=xx' requires the O32 ABI # CHECK: error: '.set fp=xx' requires the O32 ABI
# CHECK: .set fp=xx # CHECK: .set fp=xx
# CHECK: ^ # CHECK: ^

test/MC/Mips/mips64r3/abiflags.s

# RUN: llvm-mc %s -arch=mips -mcpu=mips64r3 | \ # RUN: llvm-mc %s -arch=mips -mcpu=mips64r3 -target-abi n64 | \
# RUN: FileCheck %s -check-prefix=CHECK-ASM # RUN: FileCheck %s -check-prefix=CHECK-ASM
# #
# RUN: llvm-mc %s -arch=mips -mcpu=mips64r3 -filetype=obj -o - | \ # RUN: llvm-mc %s -arch=mips -mcpu=mips64r3 -target-abi n64 -filetype=obj -o - | \
# RUN: llvm-readobj -sections -section-data -section-relocations - | \ # RUN: llvm-readobj -sections -section-data -section-relocations - | \
# RUN: FileCheck %s -check-prefix=CHECK-OBJ # RUN: FileCheck %s -check-prefix=CHECK-OBJ
# CHECK-ASM: .module fp=64 # CHECK-ASM: .module fp=64
# Checking if the Mips.abiflags were correctly emitted. # Checking if the Mips.abiflags were correctly emitted.
# CHECK-OBJ: Section { # CHECK-OBJ: Section {
# CHECK-OBJ: Index: 5 # CHECK-OBJ: Index: 5
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test/MC/Mips/mips64r5/abi-bad.s

# RUN: not llvm-mc %s -triple mips-unknown-linux -mcpu=mips64r5 2>&1 | FileCheck %s # RUN: not llvm-mc %s -triple mips-unknown-linux -mcpu=mips64r5 -target-abi n64 2>&1 | FileCheck %s
.set fp=xx .set fp=xx
# CHECK: error: '.set fp=xx' requires the O32 ABI # CHECK: error: '.set fp=xx' requires the O32 ABI
# CHECK: .set fp=xx # CHECK: .set fp=xx
# CHECK: ^ # CHECK: ^

test/MC/Mips/mips64r5/abiflags.s

# RUN: llvm-mc %s -arch=mips -mcpu=mips64r5 | \ # RUN: llvm-mc %s -arch=mips -mcpu=mips64r5 -target-abi n64 | \
# RUN: FileCheck %s -check-prefix=CHECK-ASM # RUN: FileCheck %s -check-prefix=CHECK-ASM
# #
# RUN: llvm-mc %s -arch=mips -mcpu=mips64r5 -filetype=obj -o - | \ # RUN: llvm-mc %s -arch=mips -mcpu=mips64r5 -target-abi n64 -filetype=obj -o - | \
# RUN: llvm-readobj -sections -section-data -section-relocations - | \ # RUN: llvm-readobj -sections -section-data -section-relocations - | \
# RUN: FileCheck %s -check-prefix=CHECK-OBJ # RUN: FileCheck %s -check-prefix=CHECK-OBJ
# CHECK-ASM: .module fp=64 # CHECK-ASM: .module fp=64
# Checking if the Mips.abiflags were correctly emitted. # Checking if the Mips.abiflags were correctly emitted.
# CHECK-OBJ: Section { # CHECK-OBJ: Section {
# CHECK-OBJ: Index: 5 # CHECK-OBJ: Index: 5
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test/MC/Mips/mips_abi_flags_xx.s

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# RUN: FileCheck %s -check-prefix=CHECK-OBJ -check-prefix=CHECK-OBJ-32R1 \ # RUN: FileCheck %s -check-prefix=CHECK-OBJ -check-prefix=CHECK-OBJ-32R1 \
# RUN: -check-prefix=CHECK-OBJ-MIPS # RUN: -check-prefix=CHECK-OBJ-MIPS
# RUN: llvm-mc /dev/null -arch=mips -mcpu=mips32r6 -mattr=fpxx -filetype=obj -o - | \ # RUN: llvm-mc /dev/null -arch=mips -mcpu=mips32r6 -mattr=fpxx -filetype=obj -o - | \
# RUN: llvm-readobj -sections -section-data -section-relocations -mips-abi-flags - | \ # RUN: llvm-readobj -sections -section-data -section-relocations -mips-abi-flags - | \
# RUN: FileCheck %s -check-prefix=CHECK-OBJ -check-prefix=CHECK-OBJ-32R6 \ # RUN: FileCheck %s -check-prefix=CHECK-OBJ -check-prefix=CHECK-OBJ-32R6 \
# RUN: -check-prefix=CHECK-OBJ-MIPS # RUN: -check-prefix=CHECK-OBJ-MIPS
# RUN: llvm-mc /dev/null -arch=mips -mcpu=octeon -filetype=obj -o - | \ # RUN: llvm-mc /dev/null -arch=mips -mcpu=octeon -target-abi n64 -filetype=obj -o - | \
# RUN: llvm-readobj -sections -section-data -section-relocations -mips-abi-flags - | \ # RUN: llvm-readobj -sections -section-data -section-relocations -mips-abi-flags - | \
# RUN: FileCheck %s -check-prefix=CHECK-OBJ -check-prefix=CHECK-OBJ-64R2 \ # RUN: FileCheck %s -check-prefix=CHECK-OBJ -check-prefix=CHECK-OBJ-64R2 \
# RUN: -check-prefix=CHECK-OBJ-OCTEON # RUN: -check-prefix=CHECK-OBJ-OCTEON
# CHECK-ASM: .module fp=xx # CHECK-ASM: .module fp=xx
# Checking if the Mips.abiflags were correctly emitted. # Checking if the Mips.abiflags were correctly emitted.
# CHECK-OBJ: Section { # CHECK-OBJ: Section {
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test/MC/Mips/nooddspreg-cmdarg.s

# RUN: llvm-mc %s -arch=mips -mcpu=mips32 -mattr=+fp64,+nooddspreg | \ # RUN: llvm-mc %s -arch=mips -mcpu=mips32 -mattr=+fp64,+nooddspreg | \
# RUN: FileCheck %s -check-prefix=CHECK-ASM # RUN: FileCheck %s -check-prefix=CHECK-ASM
# #
# RUN: llvm-mc %s -arch=mips -mcpu=mips32 -mattr=+fp64,+nooddspreg -filetype=obj -o - | \ # RUN: llvm-mc %s -arch=mips -mcpu=mips32 -mattr=+fp64,+nooddspreg -filetype=obj -o - | \
# RUN: llvm-readobj -sections -section-data -section-relocations - | \ # RUN: llvm-readobj -sections -section-data -section-relocations - | \
# RUN: FileCheck %s -check-prefix=CHECK-OBJ # RUN: FileCheck %s -check-prefix=CHECK-OBJ
# RUN: not llvm-mc %s -arch=mips -mcpu=mips64 -target-abi n32 -mattr=+nooddspreg 2> %t0 # RUN: not llvm-mc %s -arch=mips -mcpu=mips64 -target-abi n32 -mattr=+nooddspreg 2> %t0
# RUN: FileCheck %s -check-prefix=INVALID < %t0 # RUN: FileCheck %s -check-prefix=INVALID < %t0
# #
# RUN: not llvm-mc %s -arch=mips -mcpu=mips64 -mattr=+nooddspreg 2> %t0 # RUN: not llvm-mc %s -arch=mips -mcpu=mips64 -target-abi n64 -mattr=+nooddspreg 2> %t0
# RUN: FileCheck %s -check-prefix=INVALID < %t0 # RUN: FileCheck %s -check-prefix=INVALID < %t0
# #
# CHECK-ASM-NOT: .module nooddspreg # CHECK-ASM-NOT: .module nooddspreg
# Checking if the Mips.abiflags were correctly emitted. # Checking if the Mips.abiflags were correctly emitted.
# CHECK-OBJ: Section { # CHECK-OBJ: Section {
# CHECK-OBJ: Index: 5 # CHECK-OBJ: Index: 5
# CHECK-OBJ-LABEL: Name: .MIPS.abiflags (12) # CHECK-OBJ-LABEL: Name: .MIPS.abiflags (12)
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test/MC/Mips/nooddspreg.s

# RUN: llvm-mc %s -arch=mips -mcpu=mips32 -mattr=+fp64 | \ # RUN: llvm-mc %s -arch=mips -mcpu=mips32 -mattr=+fp64 | \
# RUN: FileCheck %s -check-prefix=CHECK-ASM # RUN: FileCheck %s -check-prefix=CHECK-ASM
# #
# RUN: llvm-mc %s -arch=mips -mcpu=mips32 -mattr=+fp64 -filetype=obj -o - | \ # RUN: llvm-mc %s -arch=mips -mcpu=mips32 -mattr=+fp64 -filetype=obj -o - | \
# RUN: llvm-readobj -sections -section-data -section-relocations - | \ # RUN: llvm-readobj -sections -section-data -section-relocations - | \
# RUN: FileCheck %s -check-prefix=CHECK-OBJ # RUN: FileCheck %s -check-prefix=CHECK-OBJ
# RUN: not llvm-mc %s -arch=mips -mcpu=mips64 -target-abi n32 2> %t1 # RUN: not llvm-mc %s -arch=mips -mcpu=mips64 -target-abi n32 2> %t1
# RUN: FileCheck %s -check-prefix=INVALID < %t1 # RUN: FileCheck %s -check-prefix=INVALID < %t1
# #
# RUN: not llvm-mc %s -arch=mips -mcpu=mips64 2> %t2 # RUN: not llvm-mc %s -arch=mips -mcpu=mips64 -target-abi n64 2> %t2
# RUN: FileCheck %s -check-prefix=INVALID < %t2 # RUN: FileCheck %s -check-prefix=INVALID < %t2
# #
# CHECK-ASM: .module nooddspreg # CHECK-ASM: .module nooddspreg
# Checking if the Mips.abiflags were correctly emitted. # Checking if the Mips.abiflags were correctly emitted.
# CHECK-OBJ: Section { # CHECK-OBJ: Section {
# CHECK-OBJ: Index: 5 # CHECK-OBJ: Index: 5
# CHECK-OBJ-LABEL: Name: .MIPS.abiflags (12) # CHECK-OBJ-LABEL: Name: .MIPS.abiflags (12)
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