Index: include/llvm/Support/ELF.h =================================================================== --- include/llvm/Support/ELF.h +++ include/llvm/Support/ELF.h @@ -614,6 +614,11 @@ #include "ELFRelocs/WebAssembly.def" }; +// ELF Relocation types for AMDGPU +enum { +#include "ELFRelocs/AMDGPU.def" +}; + #undef ELF_RELOC // Section header. Index: include/llvm/Support/ELFRelocs/AMDGPU.def =================================================================== --- /dev/null +++ include/llvm/Support/ELFRelocs/AMDGPU.def @@ -0,0 +1,11 @@ +#ifndef ELF_RELOC +#error "ELF_RELOC must be defined" +#endif + +ELF_RELOC(R_AMDGPU_NONE, 0) +ELF_RELOC(R_AMDGPU_ABS32_LO, 1) +ELF_RELOC(R_AMDGPU_ABS32_HI, 2) +ELF_RELOC(R_AMDGPU_ABS64, 3) +ELF_RELOC(R_AMDGPU_REL32, 4) +ELF_RELOC(R_AMDGPU_REL64, 5) +ELF_RELOC(R_AMDGPU_ABS32, 6) Index: lib/Object/ELF.cpp =================================================================== --- lib/Object/ELF.cpp +++ lib/Object/ELF.cpp @@ -105,6 +105,13 @@ break; } break; + case ELF::EM_AMDGPU: + switch (Type) { +#include "llvm/Support/ELFRelocs/AMDGPU.def" + default: + break; + } + break; default: break; } Index: lib/ObjectYAML/ELFYAML.cpp =================================================================== --- lib/ObjectYAML/ELFYAML.cpp +++ lib/ObjectYAML/ELFYAML.cpp @@ -531,6 +531,9 @@ case ELF::EM_LANAI: #include "llvm/Support/ELFRelocs/Lanai.def" break; + case ELF::EM_AMDGPU: +#include "llvm/Support/ELFRelocs/AMDGPU.def" + break; default: llvm_unreachable("Unsupported architecture"); } Index: test/Object/AMDGPU/elf64-relocs.yaml =================================================================== --- /dev/null +++ test/Object/AMDGPU/elf64-relocs.yaml @@ -0,0 +1,65 @@ +# RUN: yaml2obj -format=elf %s > %t +# RUN: llvm-readobj -r %t | FileCheck %s + +# CHECK: Relocations [ +# CHECK: Section (2) .rela.text { +# CHECK: 0x0 R_AMDGPU_NONE main 0x0 +# CHECK: 0x8 R_AMDGPU_ABS32_LO - 0x0 +# CHECK: 0x10 R_AMDGPU_ABS32_HI - 0x0 +# CHECK: 0x18 R_AMDGPU_ABS64 - 0x0 +# CHECK: 0x20 R_AMDGPU_REL32 - 0x0 +# CHECK: 0x28 R_AMDGPU_REL64 - 0x0 +# CHECK: 0x30 R_AMDGPU_ABS32 - 0x0 +# CHECK: } +# CHECK: ] + +FileHeader: + Class: ELFCLASS64 + Data: ELFDATA2LSB + Type: ET_REL + Machine: EM_AMDGPU +Sections: + - Type: SHT_PROGBITS + Name: .text + Flags: [ SHF_ALLOC, SHF_EXECINSTR ] + AddressAlign: 0x08 + Content: 0000000000000000 + - Type: SHT_RELA + Name: .rela.text + Link: .symtab + Info: .text + AddressAlign: 0x08 + Relocations: + - Offset: 0x0 + Symbol: main + Type: R_AMDGPU_NONE + - Offset: 0x8 + Symbol: a + Type: R_AMDGPU_ABS32_LO + - Offset: 0x10 + Symbol: b + Type: R_AMDGPU_ABS32_HI + - Offset: 0x18 + Symbol: c + Type: R_AMDGPU_ABS64 + - Offset: 0x20 + Symbol: d + Type: R_AMDGPU_REL32 + - Offset: 0x28 + Symbol: e + Type: R_AMDGPU_REL64 + - Offset: 0x30 + Symbol: f + Type: R_AMDGPU_ABS32 + +Symbols: + Local: + - Name: .text + Type: STT_SECTION + Section: .text + + Global: + - Name: main + Type: STT_FUNC + Section: .text + Size: 0x08