Index: include/llvm/Target/Target.td =================================================================== --- include/llvm/Target/Target.td +++ include/llvm/Target/Target.td @@ -789,6 +789,7 @@ let InOperandList = (ins variable_ops); let AsmString = ""; let hasSideEffects = 0; // Note side effect is encoded in an operand. + let isConvergent = 1; } def CFI_INSTRUCTION : Instruction { let OutOperandList = (outs); Index: test/CodeGen/AMDGPU/convergent-inlineasm.ll =================================================================== --- test/CodeGen/AMDGPU/convergent-inlineasm.ll +++ test/CodeGen/AMDGPU/convergent-inlineasm.ll @@ -1,38 +1,24 @@ +; RUN: llc -mtriple=amdgcn--amdhsa -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s -target triple = "amdgcn--amdhsa" -;FUNC-LABEL: {{^}}convergence_flag_inlineasm: -define void @convergence_flag_inlineasm(i64 addrspace(1)* nocapture, i32, i32, i32, i32, i32, i32, i32) #0 align 2 { - %dispatch_ptr= tail call noalias nonnull dereferenceable(64) i8 addrspace(2)* @llvm.amdgcn.dispatch.ptr() #2 - %size_xy_ptr = getelementptr inbounds i8, i8 addrspace(2)* %dispatch_ptr, i64 4 - %9 = bitcast i8 addrspace(2)* %size_xy_ptr to i32 addrspace(2)* - %size_xy = load i32, i32 addrspace(2)* %9, align 4 - %10 = and i32 %size_xy, 65535 - %11 = tail call i32 @llvm.amdgcn.workgroup.id.x() - %12 = tail call i32 @llvm.amdgcn.workitem.id.x() - %13 = mul i32 %11, %10 - %14 = add i32 %12, %13 - %a.i = tail call i64 asm "v_cmp_ne_i32_e64 $0, 0, $1", "=s,v"(i32 1) #3 - %15 = icmp eq i32 %14, 8 - br i1 %15, label %16, label %"main.exit" +declare i32 @llvm.amdgcn.workitem.id.x() #1 + +; GCN-LABEL: {{^}}convergent_inlineasm: +; GCN: BB#0: +; GCN: v_cmp_ne_i32_e64 +; GCN: BB#1: +define void @convergent_inlineasm(i64 addrspace(1)* nocapture) { + %tid = call i32 @llvm.amdgcn.workitem.id.x() readnone + %a = tail call i64 asm "v_cmp_ne_i32_e64 $0, 0, $1", "=s,v"(i32 1) #3 + %2 = icmp eq i32 %tid, 8 + br i1 %2, label %3, label %"main.exit" -;