Index: lib/Target/PowerPC/PPCInstr64Bit.td
===================================================================
--- lib/Target/PowerPC/PPCInstr64Bit.td
+++ lib/Target/PowerPC/PPCInstr64Bit.td
@@ -514,11 +514,11 @@
 def SUBFIC8: DForm_2< 8, (outs g8rc:$rD), (ins g8rc:$rA, s16imm64:$imm),
                      "subfic $rD, $rA, $imm", IIC_IntGeneral,
                      [(set i64:$rD, (subc imm64SExt16:$imm, i64:$rA))]>;
-defm SUBFC8 : XOForm_1r<31, 8, 0, (outs g8rc:$rT), (ins g8rc:$rA, g8rc:$rB),
+}
+defm SUBFC8 : XOForm_1rc<31, 8, 0, (outs g8rc:$rT), (ins g8rc:$rA, g8rc:$rB),
                         "subfc", "$rT, $rA, $rB", IIC_IntGeneral,
                         [(set i64:$rT, (subc i64:$rB, i64:$rA))]>,
                         PPC970_DGroup_Cracked;
-}
 defm SUBF8 : XOForm_1r<31, 40, 0, (outs g8rc:$rT), (ins g8rc:$rA, g8rc:$rB),
                        "subf", "$rT, $rA, $rB", IIC_IntGeneral,
                        [(set i64:$rT, (sub i64:$rB, i64:$rA))]>;
Index: lib/Target/PowerPC/PPCInstrInfo.cpp
===================================================================
--- lib/Target/PowerPC/PPCInstrInfo.cpp
+++ lib/Target/PowerPC/PPCInstrInfo.cpp
@@ -1795,6 +1795,7 @@
           MI->addOperand(*MI->getParent()->getParent(),
                          MachineOperand::CreateReg(*ImpUses, false, true));
   }
+  assert(MI->definesRegister(PPC::CR0));
 
   // Modify the condition code of operands in OperandsToUpdate.
   // Since we have SUB(r1, r2) and CMP(r2, r1), the condition code needs to
Index: test/CodeGen/PowerPC/opt-sub-inst-cr0-live.ll
===================================================================
--- /dev/null
+++ test/CodeGen/PowerPC/opt-sub-inst-cr0-live.ll
@@ -0,0 +1,24 @@
+; RUN: llc -print-before=peephole-opts -print-after=peephole-opts -mtriple=powerpc64-unknown-linux-gnu -o /dev/null 2>&1 < %s | FileCheck %s
+
+declare i128 @llvm.cttz.i128(i128, i1)
+
+define void @fn1(i128, i128, i1) {
+top:
+  br label %loop
+
+loop:
+  %v = phi i128 [ %3, %loop ], [ %0, %top ]
+  %u = phi i128 [ %3, %loop ], [ %1, %top ]
+  %s = sub i128 %v, %u
+; CHECK: SUBFC8
+; CHECK: CMPLDI
+; CHECK: BCC
+
+; CHECK: SUBFC8o {{[^,]+}}, {{[^,]+}}, %CARRY<imp-def>, %CR0<imp-def>;
+; CHECK: COPY %CR0
+; CHECK: BCC
+  %3 = call i128 @llvm.cttz.i128(i128 %s, i1 false)
+  %4 = lshr i128 %s, %3
+  %5 = select i1 %2, i128 0, i128 %4
+  br label %loop
+}