Index: hoist-spill-lpad.cc =================================================================== --- /dev/null +++ hoist-spill-lpad.cc @@ -0,0 +1,21 @@ +long a[20]; +void goo(); + +void foo() { + long r1; + + r1 = a[1]; + + try { + goo(); + } catch (int param) { + a[2] = r1; + asm volatile ("":::"%rax", "%rbx", "%rcx", "%rdx", "%rsi", "%rdi", "%rbp", "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15", "memory"); + a[3] = r1; + } + + a[4] = r1; + asm volatile ("":::"%rax", "%rbx", "%rcx", "%rdx", "%rsi", "%rdi", "%rbp", "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15", "memory"); + a[5] = r1; +} + Index: lib/CodeGen/InlineSpiller.cpp =================================================================== --- lib/CodeGen/InlineSpiller.cpp +++ lib/CodeGen/InlineSpiller.cpp @@ -13,6 +13,7 @@ //===----------------------------------------------------------------------===// #include "Spiller.h" +#include "SplitKit.h" #include "llvm/ADT/MapVector.h" #include "llvm/ADT/SetVector.h" #include "llvm/ADT/Statistic.h" @@ -68,6 +69,9 @@ const TargetRegisterInfo &TRI; const MachineBlockFrequencyInfo &MBFI; + // Analysis to determine the latest point in a Block to insert spill. + std::unique_ptr IPA; + // Map from StackSlot to its original register. DenseMap StackSlotToReg; // Map from pair of (StackSlot and Original VNI) to a set of spills which @@ -1074,7 +1078,7 @@ bool HoistSpillHelper::isSpillCandBB(unsigned OrigReg, VNInfo &OrigVNI, MachineBasicBlock &BB, unsigned &LiveReg) { SlotIndex Idx; - MachineBasicBlock::iterator MI = BB.getFirstTerminator(); + MachineBasicBlock::iterator MI = IPA->getLastInsertPointIter(BB); if (MI != BB.end()) Idx = LIS.getInstructionIndex(*MI); else @@ -1358,6 +1362,7 @@ void HoistSpillHelper::hoistAllSpills() { SmallVector NewVRegs; LiveRangeEdit Edit(nullptr, NewVRegs, MF, LIS, &VRM, this); + IPA.reset(new InsertPointAnalysis(LIS, MF.getNumBlockIDs())); // Save the mapping between stackslot and its original reg. DenseMap SlotToOrigReg; @@ -1375,6 +1380,8 @@ for (auto &Ent : MergeableSpills) { int Slot = Ent.first.first; unsigned OrigReg = SlotToOrigReg[Slot]; + LiveInterval &OrigLI = LIS.getInterval(OrigReg); + IPA->setInterval(&OrigLI); VNInfo *OrigVNI = Ent.first.second; SmallPtrSet &EqValSpills = Ent.second; if (Ent.second.empty()) @@ -1407,17 +1414,15 @@ // Stack live range update. LiveInterval &StackIntvl = LSS.getInterval(Slot); - if (!SpillsToIns.empty() || !SpillsToRm.empty()) { - LiveInterval &OrigLI = LIS.getInterval(OrigReg); + if (!SpillsToIns.empty() || !SpillsToRm.empty()) StackIntvl.MergeValueInAsValue(OrigLI, OrigVNI, StackIntvl.getValNumInfo(0)); - } // Insert hoisted spills. for (auto const Insert : SpillsToIns) { MachineBasicBlock *BB = Insert.first; unsigned LiveReg = Insert.second; - MachineBasicBlock::iterator MI = BB->getFirstTerminator(); + MachineBasicBlock::iterator MI = IPA->getLastInsertPointIter(*BB); TII.storeRegToStackSlot(*BB, MI, LiveReg, false, Slot, MRI.getRegClass(LiveReg), &TRI); LIS.InsertMachineInstrRangeInMaps(std::prev(MI), MI); Index: test/CodeGen/X86/hoist-spill-lpad.ll =================================================================== --- /dev/null +++ test/CodeGen/X86/hoist-spill-lpad.ll @@ -0,0 +1,62 @@ +; RUN: llc < %s | FileCheck %s +; +; PR27612. The following spill is hoisted from two locations: the fall +; through succ block and the landingpad block of a call which may throw +; exception. If it is not hoisted before the call, the spill will be +; missing on the landingpad path. +; +; CHECK-LABEL: _Z3foov: +; CHECK: movq %rbx, (%rsp) # 8-byte Spill +; CHECK-NEXT: callq _Z3goov + +target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" +target triple = "x86_64-unknown-linux-gnu" + +@a = global [20 x i64] zeroinitializer, align 16 +@_ZTIi = external constant i8* + +; Function Attrs: uwtable +define void @_Z3foov() personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { +entry: + %tmp = load i64, i64* getelementptr inbounds ([20 x i64], [20 x i64]* @a, i64 0, i64 1), align 8 + invoke void @_Z3goov() + to label %try.cont unwind label %lpad + +lpad: ; preds = %entry + %tmp1 = landingpad { i8*, i32 } + cleanup + catch i8* bitcast (i8** @_ZTIi to i8*) + %tmp2 = extractvalue { i8*, i32 } %tmp1, 1 + %tmp3 = tail call i32 @llvm.eh.typeid.for(i8* bitcast (i8** @_ZTIi to i8*)) + %matches = icmp eq i32 %tmp2, %tmp3 + br i1 %matches, label %catch, label %ehcleanup + +catch: ; preds = %lpad + %tmp4 = extractvalue { i8*, i32 } %tmp1, 0 + %tmp5 = tail call i8* @__cxa_begin_catch(i8* %tmp4) + store i64 %tmp, i64* getelementptr inbounds ([20 x i64], [20 x i64]* @a, i64 0, i64 2), align 16 + tail call void asm sideeffect "", "~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15},~{memory},~{dirflag},~{fpsr},~{flags}"() + store i64 %tmp, i64* getelementptr inbounds ([20 x i64], [20 x i64]* @a, i64 0, i64 3), align 8 + tail call void @__cxa_end_catch() + br label %try.cont + +try.cont: ; preds = %catch, %entry + store i64 %tmp, i64* getelementptr inbounds ([20 x i64], [20 x i64]* @a, i64 0, i64 4), align 16 + tail call void asm sideeffect "", "~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15},~{memory},~{dirflag},~{fpsr},~{flags}"() + store i64 %tmp, i64* getelementptr inbounds ([20 x i64], [20 x i64]* @a, i64 0, i64 5), align 8 + ret void + +ehcleanup: ; preds = %lpad + resume { i8*, i32 } %tmp1 +} + +declare void @_Z3goov() + +declare i32 @__gxx_personality_v0(...) + +; Function Attrs: nounwind readnone +declare i32 @llvm.eh.typeid.for(i8*) + +declare i8* @__cxa_begin_catch(i8*) + +declare void @__cxa_end_catch()