Index: lib/Analysis/LoopInfo.cpp =================================================================== --- lib/Analysis/LoopInfo.cpp +++ lib/Analysis/LoopInfo.cpp @@ -512,11 +512,14 @@ /// For subloop blocks, simply update SubloopParents and return NULL. Loop *UnloopUpdater::getNearestLoop(BasicBlock *BB, Loop *BBLoop) { + assert(Unloop && "Unloop cannot be NULL"); + // Initially for blocks directly contained by Unloop, NearLoop == Unloop and // is considered uninitialized. Loop *NearLoop = BBLoop; Loop *Subloop = nullptr; + assert(Unloop && "does not contain any loop"); if (NearLoop != Unloop && Unloop->contains(NearLoop)) { Subloop = NearLoop; // Find the subloop ancestor that is directly contained within Unloop. @@ -545,6 +548,7 @@ assert((FoundIB || !DFS.hasPostorder(*I)) && "should have seen IB"); FoundIB = true; } + assert(Unloop && "does not contain any loop"); if (L != Unloop && Unloop->contains(L)) { // Successor is in a subloop. if (Subloop) Index: lib/CodeGen/AsmPrinter/DwarfUnit.cpp =================================================================== --- lib/CodeGen/AsmPrinter/DwarfUnit.cpp +++ lib/CodeGen/AsmPrinter/DwarfUnit.cpp @@ -463,6 +463,9 @@ varField = DT; } + assert(forwardingField && "forwarding field must not be NULL"); + assert(varField && "var field must not be NULL"); + // Get the offsets for the forwarding field and the variable field. unsigned forwardingFieldOffset = forwardingField->getOffsetInBits() >> 3; unsigned varFieldOffset = varField->getOffsetInBits() >> 2; Index: lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp =================================================================== --- lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp +++ lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp @@ -6465,6 +6465,9 @@ // assign it now. if (unsigned AssignedReg = PhysReg.first) { const TargetRegisterClass *RC = PhysReg.second; + + assert(RC && "TargetRegisterClass needs to be not NULL"); + if (OpInfo.ConstraintVT == MVT::Other) ValueVT = *RC->vt_begin(); Index: lib/MC/MCParser/AsmParser.cpp =================================================================== --- lib/MC/MCParser/AsmParser.cpp +++ lib/MC/MCParser/AsmParser.cpp @@ -657,7 +657,7 @@ // section and generate a .file directive. if (getContext().getGenDwarfForAssembly()) { MCSection *Sec = getStreamer().getCurrentSection().first; - if (!Sec->getBeginSymbol()) { + if (Sec && !Sec->getBeginSymbol()) { MCSymbol *SectionStartSym = getContext().createTempSymbol(); getStreamer().EmitLabel(SectionStartSym); Sec->setBeginSymbol(SectionStartSym); Index: lib/Target/Hexagon/HexagonInstrInfo.cpp =================================================================== --- lib/Target/Hexagon/HexagonInstrInfo.cpp +++ lib/Target/Hexagon/HexagonInstrInfo.cpp @@ -1301,7 +1301,7 @@ // Keep a flag for upto 4 operands in the instructions, to indicate if // that operand has been constant extended. - bool OpCExtended[4]; + bool OpCExtended[4] = {false}; if (NumOperands > 4) NumOperands = 4; Index: lib/Target/NVPTX/NVPTXInstrInfo.cpp =================================================================== --- lib/Target/NVPTX/NVPTXInstrInfo.cpp +++ lib/Target/NVPTX/NVPTXInstrInfo.cpp @@ -179,7 +179,7 @@ return true; // If the block ends with NVPTX::GOTO and NVPTX:CBranch, handle it. - if (SecondLastInst->getOpcode() == NVPTX::CBranch && + if (SecondLastInst && SecondLastInst->getOpcode() == NVPTX::CBranch && LastInst->getOpcode() == NVPTX::GOTO) { TBB = SecondLastInst->getOperand(1).getMBB(); Cond.push_back(SecondLastInst->getOperand(0)); @@ -189,7 +189,7 @@ // If the block ends with two NVPTX:GOTOs, handle it. The second one is not // executed, so remove it. - if (SecondLastInst->getOpcode() == NVPTX::GOTO && + if (SecondLastInst && SecondLastInst->getOpcode() == NVPTX::GOTO && LastInst->getOpcode() == NVPTX::GOTO) { TBB = SecondLastInst->getOperand(0).getMBB(); I = LastInst; Index: lib/Target/TargetRecip.cpp =================================================================== --- lib/Target/TargetRecip.cpp +++ lib/Target/TargetRecip.cpp @@ -71,7 +71,7 @@ // Look for an optional setting of the number of refinement steps needed // for this type of reciprocal operation. size_t RefPos; - uint8_t RefSteps; + uint8_t RefSteps = 0; StringRef RefStepString; if (parseRefinementStep(ArgSub, RefPos, RefSteps)) { // Split the string for further processing. @@ -120,7 +120,7 @@ Val = Val.substr(1); size_t RefPos; - uint8_t RefSteps; + uint8_t RefSteps = 0; StringRef RefStepString; if (parseRefinementStep(Val, RefPos, RefSteps)) { // Split the string for further processing. Index: lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp =================================================================== --- lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp +++ lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp @@ -1309,6 +1309,8 @@ if (StoreBB == DestBB || OtherBB == DestBB) return false; + assert(OtherBB && "BasicBlock needs to be not NULL"); + // Verify that the other block ends in a branch and is not otherwise empty. BasicBlock::iterator BBI(OtherBB->getTerminator()); BranchInst *OtherBr = dyn_cast(BBI); Index: lib/Transforms/Scalar/ConstantHoisting.cpp =================================================================== --- lib/Transforms/Scalar/ConstantHoisting.cpp +++ lib/Transforms/Scalar/ConstantHoisting.cpp @@ -240,6 +240,7 @@ Instruction *ConstantHoisting:: findConstantInsertionPoint(const ConstantInfo &ConstInfo) const { assert(!ConstInfo.RebasedConstants.empty() && "Invalid constant info entry."); + assert(Entry && "Entry basic block cannot be NULL"); // Collect all basic blocks. SmallPtrSet BBs; for (auto const &RCI : ConstInfo.RebasedConstants) Index: lib/Transforms/Scalar/RewriteStatepointsForGC.cpp =================================================================== --- lib/Transforms/Scalar/RewriteStatepointsForGC.cpp +++ lib/Transforms/Scalar/RewriteStatepointsForGC.cpp @@ -1007,6 +1007,7 @@ auto *BaseIE = cast(State.getBase()); auto *BdvIE = cast(BDV); auto UpdateOperand = [&](int OperandIdx) { + assert(BaseIE && "base InsertElementInst must not be NULL"); Value *InVal = BdvIE->getOperand(OperandIdx); Value *Base = getBaseForInput(InVal, BaseIE); BaseIE->setOperand(OperandIdx, Base); Index: lib/Transforms/Vectorize/SLPVectorizer.cpp =================================================================== --- lib/Transforms/Vectorize/SLPVectorizer.cpp +++ lib/Transforms/Vectorize/SLPVectorizer.cpp @@ -2707,6 +2707,7 @@ // instructions into different buckets based on the insert lane. SmallVector Visited; for (auto I = CSEWorkList.begin(), E = CSEWorkList.end(); I != E; ++I) { + assert((I && *I) && "worklist does not contain any reachable block"); assert((I == CSEWorkList.begin() || !DT->dominates(*I, *std::prev(I))) && "Worklist not sorted properly!"); BasicBlock *BB = (*I)->getBlock(); @@ -2808,6 +2809,7 @@ calculateDependencies(Bundle, true, SLP); + assert(Bundle && "is an empty instruction bundle"); // Now try to schedule the new bundle. As soon as the bundle is "ready" it // means that there are no cyclic dependencies and we can schedule it. // Note that's important that we don't "schedule" the bundle yet (see Index: tools/dsymutil/DwarfLinker.cpp =================================================================== --- tools/dsymutil/DwarfLinker.cpp +++ tools/dsymutil/DwarfLinker.cpp @@ -2449,6 +2449,8 @@ Attr = Loc ? static_cast(Loc) : static_cast(Block); + assert(Attr && "DIEValue list needs to be not NULL"); + if (Loc) Value = DIEValue(dwarf::Attribute(AttrSpec.Attr), dwarf::Form(AttrSpec.Form), Loc);