Index: lib/CodeGen/ExecutionDepsFix.cpp
===================================================================
--- lib/CodeGen/ExecutionDepsFix.cpp
+++ lib/CodeGen/ExecutionDepsFix.cpp
@@ -168,6 +168,11 @@
 
   bool runOnMachineFunction(MachineFunction &MF) override;
 
+  MachineFunctionProperties getRequiredProperties() const override {
+    return MachineFunctionProperties().set(
+        MachineFunctionProperties::Property::AllVRegsAllocated);
+  }
+
   const char *getPassName() const override {
     return "Execution dependency fix";
   }
Index: lib/CodeGen/IfConversion.cpp
===================================================================
--- lib/CodeGen/IfConversion.cpp
+++ lib/CodeGen/IfConversion.cpp
@@ -188,6 +188,11 @@
 
     bool runOnMachineFunction(MachineFunction &MF) override;
 
+    MachineFunctionProperties getRequiredProperties() const override {
+      return MachineFunctionProperties().set(
+          MachineFunctionProperties::Property::AllVRegsAllocated);
+    }
+
   private:
     bool ReverseBranchCondition(BBInfo &BBI);
     bool ValidSimple(BBInfo &TrueBBI, unsigned &Dups,
Index: lib/Target/AArch64/AArch64A53Fix835769.cpp
===================================================================
--- lib/Target/AArch64/AArch64A53Fix835769.cpp
+++ lib/Target/AArch64/AArch64A53Fix835769.cpp
@@ -87,6 +87,11 @@
 
   bool runOnMachineFunction(MachineFunction &F) override;
 
+  MachineFunctionProperties getRequiredProperties() const override {
+    return MachineFunctionProperties().set(
+        MachineFunctionProperties::Property::AllVRegsAllocated);
+  }
+
   const char *getPassName() const override {
     return "Workaround A53 erratum 835769 pass";
   }
Index: lib/Target/AArch64/AArch64A57FPLoadBalancing.cpp
===================================================================
--- lib/Target/AArch64/AArch64A57FPLoadBalancing.cpp
+++ lib/Target/AArch64/AArch64A57FPLoadBalancing.cpp
@@ -125,6 +125,11 @@
 
   bool runOnMachineFunction(MachineFunction &F) override;
 
+  MachineFunctionProperties getRequiredProperties() const override {
+    return MachineFunctionProperties().set(
+        MachineFunctionProperties::Property::AllVRegsAllocated);
+  }
+
   const char *getPassName() const override {
     return "A57 FP Anti-dependency breaker";
   }
Index: lib/Target/AArch64/AArch64CollectLOH.cpp
===================================================================
--- lib/Target/AArch64/AArch64CollectLOH.cpp
+++ lib/Target/AArch64/AArch64CollectLOH.cpp
@@ -179,6 +179,11 @@
 
   bool runOnMachineFunction(MachineFunction &MF) override;
 
+  MachineFunctionProperties getRequiredProperties() const override {
+    return MachineFunctionProperties().set(
+        MachineFunctionProperties::Property::AllVRegsAllocated);
+  }
+
   const char *getPassName() const override {
     return AARCH64_COLLECT_LOH_NAME;
   }
Index: lib/Target/AArch64/AArch64DeadRegisterDefinitionsPass.cpp
===================================================================
--- lib/Target/AArch64/AArch64DeadRegisterDefinitionsPass.cpp
+++ lib/Target/AArch64/AArch64DeadRegisterDefinitionsPass.cpp
@@ -48,6 +48,11 @@
 
   bool runOnMachineFunction(MachineFunction &F) override;
 
+  MachineFunctionProperties getRequiredProperties() const override {
+    return MachineFunctionProperties().set(
+        MachineFunctionProperties::Property::AllVRegsAllocated);
+  }
+
   const char *getPassName() const override { return AARCH64_DEAD_REG_DEF_NAME; }
 
   void getAnalysisUsage(AnalysisUsage &AU) const override {
Index: lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
===================================================================
--- lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
+++ lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
@@ -163,6 +163,11 @@
 
   bool runOnMachineFunction(MachineFunction &Fn) override;
 
+  MachineFunctionProperties getRequiredProperties() const override {
+    return MachineFunctionProperties().set(
+        MachineFunctionProperties::Property::AllVRegsAllocated);
+  }
+
   const char *getPassName() const override {
     return AARCH64_LOAD_STORE_OPT_NAME;
   }
Index: lib/Target/AArch64/AArch64RedundantCopyElimination.cpp
===================================================================
--- lib/Target/AArch64/AArch64RedundantCopyElimination.cpp
+++ lib/Target/AArch64/AArch64RedundantCopyElimination.cpp
@@ -53,6 +53,10 @@
   AArch64RedundantCopyElimination() : MachineFunctionPass(ID) {}
   bool optimizeCopy(MachineBasicBlock *MBB);
   bool runOnMachineFunction(MachineFunction &MF) override;
+  MachineFunctionProperties getRequiredProperties() const override {
+    return MachineFunctionProperties().set(
+        MachineFunctionProperties::Property::AllVRegsAllocated);
+  }
   const char *getPassName() const override {
     return "AArch64 Redundant Copy Elimination";
   }
Index: lib/Target/ARM/ARMConstantIslandPass.cpp
===================================================================
--- lib/Target/ARM/ARMConstantIslandPass.cpp
+++ lib/Target/ARM/ARMConstantIslandPass.cpp
@@ -279,6 +279,11 @@
 
     bool runOnMachineFunction(MachineFunction &MF) override;
 
+    MachineFunctionProperties getRequiredProperties() const override {
+      return MachineFunctionProperties().set(
+          MachineFunctionProperties::Property::AllVRegsAllocated);
+    }
+
     const char *getPassName() const override {
       return "ARM constant island placement and branch shortening pass";
     }
Index: lib/Target/ARM/ARMExpandPseudoInsts.cpp
===================================================================
--- lib/Target/ARM/ARMExpandPseudoInsts.cpp
+++ lib/Target/ARM/ARMExpandPseudoInsts.cpp
@@ -50,6 +50,11 @@
 
     bool runOnMachineFunction(MachineFunction &Fn) override;
 
+    MachineFunctionProperties getRequiredProperties() const override {
+      return MachineFunctionProperties().set(
+          MachineFunctionProperties::Property::AllVRegsAllocated);
+    }
+
     const char *getPassName() const override {
       return "ARM pseudo instruction expansion pass";
     }
Index: lib/Target/ARM/ARMLoadStoreOptimizer.cpp
===================================================================
--- lib/Target/ARM/ARMLoadStoreOptimizer.cpp
+++ lib/Target/ARM/ARMLoadStoreOptimizer.cpp
@@ -99,6 +99,11 @@
 
     bool runOnMachineFunction(MachineFunction &Fn) override;
 
+    MachineFunctionProperties getRequiredProperties() const override {
+      return MachineFunctionProperties().set(
+          MachineFunctionProperties::Property::AllVRegsAllocated);
+    }
+
     const char *getPassName() const override {
       return ARM_LOAD_STORE_OPT_NAME;
     }
@@ -2369,4 +2374,3 @@
     return new ARMPreAllocLoadStoreOpt();
   return new ARMLoadStoreOpt();
 }
-
Index: lib/Target/ARM/ARMOptimizeBarriersPass.cpp
===================================================================
--- lib/Target/ARM/ARMOptimizeBarriersPass.cpp
+++ lib/Target/ARM/ARMOptimizeBarriersPass.cpp
@@ -27,6 +27,11 @@
 
   bool runOnMachineFunction(MachineFunction &Fn) override;
 
+  MachineFunctionProperties getRequiredProperties() const override {
+    return MachineFunctionProperties().set(
+        MachineFunctionProperties::Property::AllVRegsAllocated);
+  }
+
   const char *getPassName() const override {
     return "optimise barriers pass";
   }
Index: lib/Target/ARM/Thumb2ITBlockPass.cpp
===================================================================
--- lib/Target/ARM/Thumb2ITBlockPass.cpp
+++ lib/Target/ARM/Thumb2ITBlockPass.cpp
@@ -36,6 +36,11 @@
 
     bool runOnMachineFunction(MachineFunction &Fn) override;
 
+    MachineFunctionProperties getRequiredProperties() const override {
+      return MachineFunctionProperties().set(
+          MachineFunctionProperties::Property::AllVRegsAllocated);
+    }
+
     const char *getPassName() const override {
       return "Thumb IT blocks insertion pass";
     }
Index: lib/Target/ARM/Thumb2SizeReduction.cpp
===================================================================
--- lib/Target/ARM/Thumb2SizeReduction.cpp
+++ lib/Target/ARM/Thumb2SizeReduction.cpp
@@ -143,6 +143,11 @@
 
     bool runOnMachineFunction(MachineFunction &MF) override;
 
+    MachineFunctionProperties getRequiredProperties() const override {
+      return MachineFunctionProperties().set(
+          MachineFunctionProperties::Property::AllVRegsAllocated);
+    }
+
     const char *getPassName() const override {
       return "Thumb2 instruction size reduction pass";
     }
Index: lib/Target/Hexagon/HexagonCFGOptimizer.cpp
===================================================================
--- lib/Target/Hexagon/HexagonCFGOptimizer.cpp
+++ lib/Target/Hexagon/HexagonCFGOptimizer.cpp
@@ -50,6 +50,10 @@
     return "Hexagon CFG Optimizer";
   }
   bool runOnMachineFunction(MachineFunction &Fn) override;
+  MachineFunctionProperties getRequiredProperties() const override {
+    return MachineFunctionProperties().set(
+        MachineFunctionProperties::Property::AllVRegsAllocated);
+  }
 };
 
 
Index: lib/Target/Hexagon/HexagonCopyToCombine.cpp
===================================================================
--- lib/Target/Hexagon/HexagonCopyToCombine.cpp
+++ lib/Target/Hexagon/HexagonCopyToCombine.cpp
@@ -86,6 +86,11 @@
 
   bool runOnMachineFunction(MachineFunction &Fn) override;
 
+  MachineFunctionProperties getRequiredProperties() const override {
+    return MachineFunctionProperties().set(
+        MachineFunctionProperties::Property::AllVRegsAllocated);
+  }
+
 private:
   MachineInstr *findPairable(MachineInstr *I1, bool &DoInsertAtI1,
                              bool AllowC64);
Index: lib/Target/Hexagon/HexagonFixupHwLoops.cpp
===================================================================
--- lib/Target/Hexagon/HexagonFixupHwLoops.cpp
+++ lib/Target/Hexagon/HexagonFixupHwLoops.cpp
@@ -45,6 +45,11 @@
 
     bool runOnMachineFunction(MachineFunction &MF) override;
 
+    MachineFunctionProperties getRequiredProperties() const override {
+      return MachineFunctionProperties().set(
+          MachineFunctionProperties::Property::AllVRegsAllocated);
+    }
+
     const char *getPassName() const override {
       return "Hexagon Hardware Loop Fixup";
     }
Index: lib/Target/Hexagon/HexagonFrameLowering.cpp
===================================================================
--- lib/Target/Hexagon/HexagonFrameLowering.cpp
+++ lib/Target/Hexagon/HexagonFrameLowering.cpp
@@ -170,6 +170,10 @@
       initializeHexagonCallFrameInformationPass(PR);
     }
     bool runOnMachineFunction(MachineFunction &MF) override;
+    MachineFunctionProperties getRequiredProperties() const override {
+      return MachineFunctionProperties().set(
+          MachineFunctionProperties::Property::AllVRegsAllocated);
+    }
   };
 
   char HexagonCallFrameInformation::ID = 0;
Index: lib/Target/Hexagon/HexagonGenMux.cpp
===================================================================
--- lib/Target/Hexagon/HexagonGenMux.cpp
+++ lib/Target/Hexagon/HexagonGenMux.cpp
@@ -49,6 +49,10 @@
       MachineFunctionPass::getAnalysisUsage(AU);
     }
     bool runOnMachineFunction(MachineFunction &MF) override;
+    MachineFunctionProperties getRequiredProperties() const override {
+      return MachineFunctionProperties().set(
+          MachineFunctionProperties::Property::AllVRegsAllocated);
+    }
 
   private:
     const HexagonInstrInfo *HII;
@@ -316,4 +320,3 @@
 FunctionPass *llvm::createHexagonGenMux() {
   return new HexagonGenMux();
 }
-
Index: lib/Target/Hexagon/HexagonNewValueJump.cpp
===================================================================
--- lib/Target/Hexagon/HexagonNewValueJump.cpp
+++ lib/Target/Hexagon/HexagonNewValueJump.cpp
@@ -87,6 +87,10 @@
     }
 
     bool runOnMachineFunction(MachineFunction &Fn) override;
+    MachineFunctionProperties getRequiredProperties() const override {
+      return MachineFunctionProperties().set(
+          MachineFunctionProperties::Property::AllVRegsAllocated);
+    }
 
   private:
     /// \brief A handle to the branch probability pass.
Index: lib/Target/Hexagon/HexagonRDFOpt.cpp
===================================================================
--- lib/Target/Hexagon/HexagonRDFOpt.cpp
+++ lib/Target/Hexagon/HexagonRDFOpt.cpp
@@ -55,6 +55,11 @@
     }
     bool runOnMachineFunction(MachineFunction &MF) override;
 
+    MachineFunctionProperties getRequiredProperties() const override {
+      return MachineFunctionProperties().set(
+          MachineFunctionProperties::Property::AllVRegsAllocated);
+    }
+
     static char ID;
 
   private:
Index: lib/Target/Hexagon/HexagonSplitConst32AndConst64.cpp
===================================================================
--- lib/Target/Hexagon/HexagonSplitConst32AndConst64.cpp
+++ lib/Target/Hexagon/HexagonSplitConst32AndConst64.cpp
@@ -61,6 +61,10 @@
       return "Hexagon Split Const32s and Const64s";
     }
     bool runOnMachineFunction(MachineFunction &Fn) override;
+    MachineFunctionProperties getRequiredProperties() const override {
+      return MachineFunctionProperties().set(
+          MachineFunctionProperties::Property::AllVRegsAllocated);
+    }
 };
 
 
Index: lib/Target/Hexagon/HexagonVLIWPacketizer.cpp
===================================================================
--- lib/Target/Hexagon/HexagonVLIWPacketizer.cpp
+++ lib/Target/Hexagon/HexagonVLIWPacketizer.cpp
@@ -81,6 +81,10 @@
       return "Hexagon Packetizer";
     }
     bool runOnMachineFunction(MachineFunction &Fn) override;
+    MachineFunctionProperties getRequiredProperties() const override {
+      return MachineFunctionProperties().set(
+          MachineFunctionProperties::Property::AllVRegsAllocated);
+    }
 
   private:
     const HexagonInstrInfo *HII;
@@ -1597,4 +1601,3 @@
 FunctionPass *llvm::createHexagonPacketizer() {
   return new HexagonPacketizer();
 }
-
Index: lib/Target/Lanai/LanaiDelaySlotFiller.cpp
===================================================================
--- lib/Target/Lanai/LanaiDelaySlotFiller.cpp
+++ lib/Target/Lanai/LanaiDelaySlotFiller.cpp
@@ -58,6 +58,11 @@
     return Changed;
   }
 
+  MachineFunctionProperties getRequiredProperties() const override {
+    return MachineFunctionProperties().set(
+        MachineFunctionProperties::Property::AllVRegsAllocated);
+  }
+
   void insertDefsUses(MachineBasicBlock::instr_iterator MI,
                       SmallSet<unsigned, 32> &RegDefs,
                       SmallSet<unsigned, 32> &RegUses);
Index: lib/Target/Lanai/LanaiMemAluCombiner.cpp
===================================================================
--- lib/Target/Lanai/LanaiMemAluCombiner.cpp
+++ lib/Target/Lanai/LanaiMemAluCombiner.cpp
@@ -67,6 +67,11 @@
 
   bool runOnMachineFunction(MachineFunction &F) override;
 
+  MachineFunctionProperties getRequiredProperties() const override {
+    return MachineFunctionProperties().set(
+        MachineFunctionProperties::Property::AllVRegsAllocated);
+  }
+
 private:
   MbbIterator findClosestSuitableAluInstr(MachineBasicBlock *BB,
                                           const MbbIterator &MemInstr,
Index: lib/Target/Lanai/LanaiSetflagAluCombiner.cpp
===================================================================
--- lib/Target/Lanai/LanaiSetflagAluCombiner.cpp
+++ lib/Target/Lanai/LanaiSetflagAluCombiner.cpp
@@ -50,6 +50,11 @@
 
   bool runOnMachineFunction(MachineFunction &F) override;
 
+  MachineFunctionProperties getRequiredProperties() const override {
+    return MachineFunctionProperties().set(
+        MachineFunctionProperties::Property::AllVRegsAllocated);
+  }
+
 private:
   bool CombineSetflagAluInBasicBlock(MachineFunction *MF,
                                      MachineBasicBlock *BB);
Index: lib/Target/MSP430/MSP430BranchSelector.cpp
===================================================================
--- lib/Target/MSP430/MSP430BranchSelector.cpp
+++ lib/Target/MSP430/MSP430BranchSelector.cpp
@@ -39,6 +39,11 @@
 
     bool runOnMachineFunction(MachineFunction &Fn) override;
 
+    MachineFunctionProperties getRequiredProperties() const override {
+      return MachineFunctionProperties().set(
+          MachineFunctionProperties::Property::AllVRegsAllocated);
+    }
+
     const char *getPassName() const override {
       return "MSP430 Branch Selector";
     }
Index: lib/Target/Mips/MipsConstantIslandPass.cpp
===================================================================
--- lib/Target/Mips/MipsConstantIslandPass.cpp
+++ lib/Target/Mips/MipsConstantIslandPass.cpp
@@ -375,6 +375,11 @@
 
     bool runOnMachineFunction(MachineFunction &F) override;
 
+    MachineFunctionProperties getRequiredProperties() const override {
+      return MachineFunctionProperties().set(
+          MachineFunctionProperties::Property::AllVRegsAllocated);
+    }
+
     void doInitialPlacement(std::vector<MachineInstr*> &CPEMIs);
     CPEntry *findConstPoolEntry(unsigned CPI, const MachineInstr *CPEMI);
     unsigned getCPELogAlign(const MachineInstr *CPEMI);
@@ -1710,4 +1715,3 @@
     }
   }
 }
-
Index: lib/Target/Mips/MipsDelaySlotFiller.cpp
===================================================================
--- lib/Target/Mips/MipsDelaySlotFiller.cpp
+++ lib/Target/Mips/MipsDelaySlotFiller.cpp
@@ -189,6 +189,11 @@
       return Changed;
     }
 
+    MachineFunctionProperties getRequiredProperties() const override {
+      return MachineFunctionProperties().set(
+          MachineFunctionProperties::Property::AllVRegsAllocated);
+    }
+
     void getAnalysisUsage(AnalysisUsage &AU) const override {
       AU.addRequired<MachineBranchProbabilityInfo>();
       MachineFunctionPass::getAnalysisUsage(AU);
Index: lib/Target/Mips/MipsHazardSchedule.cpp
===================================================================
--- lib/Target/Mips/MipsHazardSchedule.cpp
+++ lib/Target/Mips/MipsHazardSchedule.cpp
@@ -75,6 +75,11 @@
 
   bool runOnMachineFunction(MachineFunction &F) override;
 
+  MachineFunctionProperties getRequiredProperties() const override {
+    return MachineFunctionProperties().set(
+        MachineFunctionProperties::Property::AllVRegsAllocated);
+  }
+
 private:
   static char ID;
 };
Index: lib/Target/Mips/MipsLongBranch.cpp
===================================================================
--- lib/Target/Mips/MipsLongBranch.cpp
+++ lib/Target/Mips/MipsLongBranch.cpp
@@ -73,6 +73,11 @@
 
     bool runOnMachineFunction(MachineFunction &F) override;
 
+    MachineFunctionProperties getRequiredProperties() const override {
+      return MachineFunctionProperties().set(
+          MachineFunctionProperties::Property::AllVRegsAllocated);
+    }
+
   private:
     void splitMBB(MachineBasicBlock *MBB);
     void initMBBInfo();
Index: lib/Target/PowerPC/PPCBranchSelector.cpp
===================================================================
--- lib/Target/PowerPC/PPCBranchSelector.cpp
+++ lib/Target/PowerPC/PPCBranchSelector.cpp
@@ -46,6 +46,11 @@
 
     bool runOnMachineFunction(MachineFunction &Fn) override;
 
+    MachineFunctionProperties getRequiredProperties() const override {
+      return MachineFunctionProperties().set(
+          MachineFunctionProperties::Property::AllVRegsAllocated);
+    }
+
     const char *getPassName() const override {
       return "PowerPC Branch Selector";
     }
@@ -234,4 +239,3 @@
   BlockSizes.clear();
   return true;
 }
-
Index: lib/Target/PowerPC/PPCEarlyReturn.cpp
===================================================================
--- lib/Target/PowerPC/PPCEarlyReturn.cpp
+++ lib/Target/PowerPC/PPCEarlyReturn.cpp
@@ -192,6 +192,11 @@
       return Changed;
     }
 
+    MachineFunctionProperties getRequiredProperties() const override {
+      return MachineFunctionProperties().set(
+          MachineFunctionProperties::Property::AllVRegsAllocated);
+    }
+
     void getAnalysisUsage(AnalysisUsage &AU) const override {
       MachineFunctionPass::getAnalysisUsage(AU);
     }
@@ -204,4 +209,3 @@
 char PPCEarlyReturn::ID = 0;
 FunctionPass*
 llvm::createPPCEarlyReturnPass() { return new PPCEarlyReturn(); }
-
Index: lib/Target/Sparc/DelaySlotFiller.cpp
===================================================================
--- lib/Target/Sparc/DelaySlotFiller.cpp
+++ lib/Target/Sparc/DelaySlotFiller.cpp
@@ -66,6 +66,11 @@
       return Changed;
     }
 
+    MachineFunctionProperties getRequiredProperties() const override {
+      return MachineFunctionProperties().set(
+          MachineFunctionProperties::Property::AllVRegsAllocated);
+    }
+
     void insertCallDefsUses(MachineBasicBlock::iterator MI,
                             SmallSet<unsigned, 32>& RegDefs,
                             SmallSet<unsigned, 32>& RegUses);
Index: lib/Target/SystemZ/SystemZElimCompare.cpp
===================================================================
--- lib/Target/SystemZ/SystemZElimCompare.cpp
+++ lib/Target/SystemZ/SystemZElimCompare.cpp
@@ -65,6 +65,10 @@
 
   bool processBlock(MachineBasicBlock &MBB);
   bool runOnMachineFunction(MachineFunction &F) override;
+  MachineFunctionProperties getRequiredProperties() const override {
+    return MachineFunctionProperties().set(
+        MachineFunctionProperties::Property::AllVRegsAllocated);
+  }
 
 private:
   Reference getRegReferences(MachineInstr *MI, unsigned Reg);
Index: lib/Target/SystemZ/SystemZLongBranch.cpp
===================================================================
--- lib/Target/SystemZ/SystemZLongBranch.cpp
+++ lib/Target/SystemZ/SystemZLongBranch.cpp
@@ -139,6 +139,10 @@
   }
 
   bool runOnMachineFunction(MachineFunction &F) override;
+  MachineFunctionProperties getRequiredProperties() const override {
+    return MachineFunctionProperties().set(
+        MachineFunctionProperties::Property::AllVRegsAllocated);
+  }
 
 private:
   void skipNonTerminators(BlockPosition &Position, MBBInfo &Block);
Index: lib/Target/SystemZ/SystemZShortenInst.cpp
===================================================================
--- lib/Target/SystemZ/SystemZShortenInst.cpp
+++ lib/Target/SystemZ/SystemZShortenInst.cpp
@@ -35,6 +35,10 @@
 
   bool processBlock(MachineBasicBlock &MBB);
   bool runOnMachineFunction(MachineFunction &F) override;
+  MachineFunctionProperties getRequiredProperties() const override {
+    return MachineFunctionProperties().set(
+        MachineFunctionProperties::Property::AllVRegsAllocated);
+  }
 
 private:
   bool shortenIIF(MachineInstr &MI, unsigned LLIxL, unsigned LLIxH);
Index: lib/Target/X86/X86ExpandPseudo.cpp
===================================================================
--- lib/Target/X86/X86ExpandPseudo.cpp
+++ lib/Target/X86/X86ExpandPseudo.cpp
@@ -48,6 +48,11 @@
 
   bool runOnMachineFunction(MachineFunction &Fn) override;
 
+  MachineFunctionProperties getRequiredProperties() const override {
+    return MachineFunctionProperties().set(
+        MachineFunctionProperties::Property::AllVRegsAllocated);
+  }
+
   const char *getPassName() const override {
     return "X86 pseudo instruction expansion pass";
   }
Index: lib/Target/X86/X86FixupBWInsts.cpp
===================================================================
--- lib/Target/X86/X86FixupBWInsts.cpp
+++ lib/Target/X86/X86FixupBWInsts.cpp
@@ -112,6 +112,11 @@
   /// where performance or code size can be improved.
   bool runOnMachineFunction(MachineFunction &MF) override;
 
+  MachineFunctionProperties getRequiredProperties() const override {
+    return MachineFunctionProperties().set(
+        MachineFunctionProperties::Property::AllVRegsAllocated);
+  }
+
 private:
   MachineFunction *MF;
 
Index: lib/Target/X86/X86FixupLEAs.cpp
===================================================================
--- lib/Target/X86/X86FixupLEAs.cpp
+++ lib/Target/X86/X86FixupLEAs.cpp
@@ -92,6 +92,12 @@
   /// if needed and when possible.
   bool runOnMachineFunction(MachineFunction &MF) override;
 
+  // This pass runs after regalloc and doesn't support VReg operands.
+  MachineFunctionProperties getRequiredProperties() const override {
+    return MachineFunctionProperties().set(
+        MachineFunctionProperties::Property::AllVRegsAllocated);
+  }
+
 private:
   MachineFunction *MF;
   const X86InstrInfo *TII; // Machine instruction info.
Index: lib/Target/X86/X86FloatingPoint.cpp
===================================================================
--- lib/Target/X86/X86FloatingPoint.cpp
+++ lib/Target/X86/X86FloatingPoint.cpp
@@ -76,6 +76,11 @@
 
     bool runOnMachineFunction(MachineFunction &MF) override;
 
+    MachineFunctionProperties getRequiredProperties() const override {
+      return MachineFunctionProperties().set(
+          MachineFunctionProperties::Property::AllVRegsAllocated);
+    }
+
     const char *getPassName() const override { return "X86 FP Stackifier"; }
 
   private:
Index: lib/Target/X86/X86PadShortFunction.cpp
===================================================================
--- lib/Target/X86/X86PadShortFunction.cpp
+++ lib/Target/X86/X86PadShortFunction.cpp
@@ -55,6 +55,11 @@
 
     bool runOnMachineFunction(MachineFunction &MF) override;
 
+    MachineFunctionProperties getRequiredProperties() const override {
+      return MachineFunctionProperties().set(
+          MachineFunctionProperties::Property::AllVRegsAllocated);
+    }
+
     const char *getPassName() const override {
       return "X86 Atom pad short functions";
     }
Index: lib/Target/X86/X86VZeroUpper.cpp
===================================================================
--- lib/Target/X86/X86VZeroUpper.cpp
+++ lib/Target/X86/X86VZeroUpper.cpp
@@ -38,6 +38,10 @@
 
     VZeroUpperInserter() : MachineFunctionPass(ID) {}
     bool runOnMachineFunction(MachineFunction &MF) override;
+    MachineFunctionProperties getRequiredProperties() const override {
+      return MachineFunctionProperties().set(
+          MachineFunctionProperties::Property::AllVRegsAllocated);
+    }
     const char *getPassName() const override {return "X86 vzeroupper inserter";}
 
   private:
Index: lib/Target/XCore/XCoreFrameToArgsOffsetElim.cpp
===================================================================
--- lib/Target/XCore/XCoreFrameToArgsOffsetElim.cpp
+++ lib/Target/XCore/XCoreFrameToArgsOffsetElim.cpp
@@ -28,6 +28,10 @@
     XCoreFTAOElim() : MachineFunctionPass(ID) {}
 
     bool runOnMachineFunction(MachineFunction &Fn) override;
+    MachineFunctionProperties getRequiredProperties() const override {
+      return MachineFunctionProperties().set(
+          MachineFunctionProperties::Property::AllVRegsAllocated);
+    }
 
     const char *getPassName() const override {
       return "XCore FRAME_TO_ARGS_OFFSET Elimination";
Index: test/CodeGen/MIR/ARM/ARMLoadStoreDBG.mir
===================================================================
--- test/CodeGen/MIR/ARM/ARMLoadStoreDBG.mir
+++ test/CodeGen/MIR/ARM/ARMLoadStoreDBG.mir
@@ -81,6 +81,7 @@
 alignment:       1
 exposesReturnsTwice: false
 hasInlineAsm:    false
+allVRegsAllocated: true
 isSSA:           false
 tracksRegLiveness: true
 tracksSubRegLiveness: false